公开(公告)号：US20240105683A1

公开(公告)日：2024-03-28

申请号：US17955225

申请日：2022-09-28

Applicant: GlobalFoundries U.S. Inc.

Inventor： Vvss Satyasuresh Choppalli ,  Anupam Dutta ,  Rajendran Krishnasamy ,  Robert Gauthier, JR. ,  Xiang Xiang Lu ,  Anindya Nath

IPC: H01L25/07 ,  H01L21/77 ,  H01L23/14 ,  H01L23/522

CPC classification number: H01L25/072 ,  H01L21/77 ,  H01L23/147 ,  H01L23/5228

Abstract: Structures including multiple semiconductor devices and methods of forming same. The structure comprises a first device structure including a first well and a second well in a semiconductor substrate, a second device structure including a doped region in the semiconductor substrate, and a first high-resistivity region in the semiconductor substrate. The first well has a first conductivity type, the second well has a second conductivity type opposite to the first conductivity type, and the first well adjoins the second well to define a p-n junction. The doped region of the second device structure has the first conductivity type or the second conductivity type. The high-resistivity region has a higher electrical resistivity than the semiconductor substrate, and the high-resistivity region is positioned between the first device structure and the second device structure.