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公开(公告)号:US11475169B2
公开(公告)日:2022-10-18
申请号:US16291094
申请日:2019-03-04
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Martin Foltin , Aalap Tripathy , Harvey Edward White, Jr. , John Paul Strachan
Abstract: Examples described herein relate to a security system consistent with the disclosure. For instance, the security system may comprise a sensor interface bridge connecting a gateway to an input/output (I/O) card, a Field Programmable Gate Array (FPGA) to scan data to detect an anomaly in the data while the data is in the sensor interface bridge, where a learning neural network accelerator Application-Specific Integrated Circuit (ASIC) is integrated with the FPGA and send the data without an anomaly to the gateway.
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公开(公告)号:US12001183B2
公开(公告)日:2024-06-04
申请号:US17186678
申请日:2021-02-26
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Martin Foltin , William Edward White , Aalap Tripathy , Harvey Edward White, Jr.
IPC: G05B19/042 , G06F9/54
CPC classification number: G05B19/0423 , G06F9/544 , G06F9/546 , G05B2219/21063 , G05B2219/25257
Abstract: Systems and methods are provided for enabling coexistence of Information Technology (IT) systems and Operational Technology (OT) systems, where advanced computing functionality realized by the IT systems can be applied to legacy applications and incumbent hardware technologies resident in the OT systems. A distributed control node (DCN) implemented between the IT and OT systems may comprise a microcontroller system partitioned into two processor clusters. Microservices associated with the IT systems are provisioned to a high performance processor cluster, and legacy applications running bare metal associated with the OT systems are provisioned to a real-time processor cluster. Partitioning of the microcontroller system allows for interoperability between the microservices and the legacy applications.
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公开(公告)号:US11521908B2
公开(公告)日:2022-12-06
申请号:US16930877
申请日:2020-07-16
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
IPC: H01L23/367 , H01L23/34 , H01L23/04
Abstract: Examples include a computing system including a heater element for heating a processor device installed in the computing system. The computing system includes a chassis, a circuit board assembly housed in the chassis and a heat sink assembly disposed on the chassis to form a cover of the chassis. The circuit board assembly includes a processor package including a substrate having a first portion and a second portion. The processor package includes the processor device disposed on the first portion of the substrate. The heater element disposed on the second portion of the substrate. In the computing system, the heat sink assembly is disposed on the chassis such that a gap separates the heat sink assembly and the heater element.
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