Synchronization method and device

    公开(公告)号:US12133185B2

    公开(公告)日:2024-10-29

    申请号:US17725962

    申请日:2022-04-21

    CPC classification number: H04W56/001 H04J3/0667 H04W80/02

    Abstract: Embodiments of this application disclose a synchronization method and a device. A device marks, based on a preset period, a periodic code block in a data bitstream to be sent from a MAC layer to a PHY layer. The device sends the data bitstream to a peer device through the PHY layer, records a sending time of each periodic code block as a first timestamp during sending, and returns the first timestamp to the MAC layer. By marking a timestamp for the periodic code block received from the MAC layer, the device sets a PHY-layer-based time reference scale (namely, the first timestamp) at the PHY layer.

    Method and Chip for Cyclic Code Encoding, Circuit Component, and Electronic Device

    公开(公告)号:US20240045758A1

    公开(公告)日:2024-02-08

    申请号:US18489276

    申请日:2023-10-18

    CPC classification number: G06F11/085

    Abstract: According to embodiments of the present disclosure, a method and a chip for cyclic code encoding, a circuit component, and an electronic device are provided. The method includes: generating, based on a first symbol sequence related to a first part of symbols in the K payload symbols, a first parity sequence corresponding to the first symbol sequence; generating, based on a second symbol sequence related to a second part of symbols in the K payload symbols, a second parity sequence corresponding to the second symbol sequence, where the first part of symbols are different from the second part of symbols; generating the (N−K) parity symbols based on the first parity sequence and the second parity sequence.

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