Abstract:
An address check boundary (ACB) register is initialized in accordance with the total amount of control/main storage with common addressing and with the relative amounts of control and main storage for the purpose of: 1. PROVIDING THE HIGHER ORDER BITS OF CONTROL STORE ADDRESS THUS PERMITTING FEWER BITS IN THE MICROPROGRAM SUPPLIED CONTROL STORE ADDRESS WITH RESULTING REDUCTION IN THE CONTROL WORD SIZE; 2. MODIFYING THE ACB supplied higher order bits and/or the microprogram supplied address bits where required; 3. SUPPLYING THE BOUNDARY ADDRESS BETWEEN CONTROL/MAIN STORE TO INITIATE AN ERROR SIGNAL IF MAIN STORE IS ACCESSED WHEN CONTROL STORE SHOULD HAVE BEEN ACCESSED AND VICE VERSA; 4. PROVIDING DATA REGARDING THE TYPE (INTERNAL - EXTERNAL) AND AMOUNT OF MAIN STORAGE AND REGARDING THE SYSTEM TYPE - SIMPLEX (ONE PROCESSOR) OR DUPLEX (TWO PROCESSORS).