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公开(公告)号：US20130146671A1
公开(公告)日：2013-06-13
申请号：US13713123
申请日：2012-12-13
Applicant: INFINEON TECHNOLOGIES AG
Inventor： Thomas Grieshofer , Stephan Rampetzreiter , Andreas Woerle
IPC: G06K19/077 , H01Q1/36
CPC classification number: G06K19/07794 , H01Q1/2225 , H01Q1/36 , H01Q7/00
Abstract: In various embodiments, a booster antenna structure for a chip card is provided, wherein the booster antenna structure may include a booster antenna; and an additional electrically conductive structure connected to the booster antenna.
Abstract translation: 在各种实施例中，提供了一种用于芯片卡的增强天线结构，其中所述增强天线结构可以包括增强天线; 以及连接到增强天线的附加导电结构。
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公开(公告)号：US09275324B2
公开(公告)日：2016-03-01
申请号：US13713123
申请日：2012-12-13
Applicant: Infineon Technologies AG
Inventor： Thomas Grieshofer , Stephan Rampetzreiter , Andreas Woerle
IPC: G06K19/06 , G06K19/077 , H01Q1/36 , H01Q7/00 , H01Q1/22
CPC classification number: G06K19/07794 , H01Q1/2225 , H01Q1/36 , H01Q7/00
Abstract: In various embodiments, a booster antenna structure for a chip card is provided, wherein the booster antenna structure may include a booster antenna; and an additional electrically conductive structure connected to the booster antenna.
Abstract translation: 在各种实施例中，提供了一种用于芯片卡的增强天线结构，其中所述增强天线结构可以包括增强天线; 以及连接到增强天线的附加导电结构。
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公开(公告)号：US08833668B2
公开(公告)日：2014-09-16
申请号：US13711707
申请日：2012-12-12
Applicant: Infineon Technologies AG
Inventor： Thomas Grieshofer , Peter Raggam , Andreas Woerle
IPC: G06K19/07 , G06K19/077 , H05K1/02
CPC classification number: H05K1/0296 , G06K19/0723 , G06K19/07769 , G06K19/07783
Abstract: In various embodiments, a chip card contact array arrangement is provided, having a carrier, a plurality of contact arrays which are arranged on a first side of the carrier, an electrically conductive structure which is arranged on a second side of the carrier, which is arranged opposite the first side of the carrier, a first plated-through hole and a second plated-through hole, wherein the first plated-through hole is coupled to the electrically conductive structure, a connecting structure which is arranged on the first side of the carrier, wherein the connecting structure connects the first plated-through hole to the second plated-through hole, the connecting structure having a longitudinal extent which runs parallel to a direction in which a contact-connection device on a reading device is moved relative to the plurality of contacts.
Abstract translation: 在各种实施例中，提供了芯片卡接触阵列布置，其具有载体，布置在载体的第一侧上的多个接触阵列，布置在载体的第二侧上的导电结构， 与所述载体的第一侧相对布置有第一电镀通孔和第二电镀通孔，其中所述第一电镀通孔与所述导电结构耦合，连接结构布置在所述导电结构的第一侧上 载体，其中所述连接结构将所述第一电镀通孔连接到所述第二电镀通孔，所述连接结构具有纵向延伸，所述纵向延伸平行于读取装置上的接触连接装置相对于所述第二电镀通孔移动的方向延伸; 多个联系人
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公开(公告)号：US20130146670A1
公开(公告)日：2013-06-13
申请号：US13711707
申请日：2012-12-12
Applicant: Infineon Technologies AG
Inventor： Thomas Grieshofer , Peter Raggam , Andreas Woerle
CPC classification number: H05K1/0296 , G06K19/0723 , G06K19/07769 , G06K19/07783
Abstract: In various embodiments, a chip card contact array arrangement is provided, having a carrier, a plurality of contact arrays which are arranged on a first side of the carrier, an electrically conductive structure which is arranged on a second side of the carrier, which is arranged opposite the first side of the carrier, a first plated-through hole and a second plated-through hole, wherein the first plated-through hole is coupled to the electrically conductive structure, a connecting structure which is arranged on the first side of the carrier, wherein the connecting structure connects the first plated-through hole to the second plated-through hole, the connecting structure having a longitudinal extent which runs parallel to a direction in which a contact-connection device on a reading device is moved relative to the plurality of contacts.
Abstract translation: 在各种实施例中，提供了芯片卡接触阵列布置，其具有载体，布置在载体的第一侧上的多个接触阵列，布置在载体的第二侧上的导电结构， 与所述载体的第一侧相对布置有第一电镀通孔和第二电镀通孔，其中所述第一电镀通孔与所述导电结构耦合，连接结构布置在所述导电结构的第一侧上 载体，其中所述连接结构将所述第一电镀通孔连接到所述第二电镀通孔，所述连接结构具有纵向延伸，所述纵向延伸平行于读取装置上的接触连接装置相对于所述第二电镀通孔移动的方向延伸; 多个联系人
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