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公开(公告)号:US20190149792A1
公开(公告)日:2019-05-16
申请号:US16304456
申请日:2016-06-27
Applicant: Intel Corporation
Inventor: Ning Luo , Changliang Wang
Abstract: Methods, systems, and articles of multi-dynamic range multi-layer video blending with alpha channel sideband for video playback.
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公开(公告)号:US20240135485A1
公开(公告)日:2024-04-25
申请号:US18460044
申请日:2023-09-01
Applicant: Intel Corporation
Inventor: Fan He , Yi Qian , Ning Luo , Yunbiao Lin , Changliang Wang , Ximin Zhang
CPC classification number: G06T1/20 , G06N3/092 , G06T15/005
Abstract: The disclosure relates to tuning configuration parameters for graphics pipeline for better user experience. A device for graphics processing, comprising: hardware engines; a graphics pipeline at least partly implemented by the hardware engines; and a tuner, coupled to the hardware engines and the graphics pipeline, the tuner to: collect statuses of the device during runtime for a previous frame; determine configuration parameters based on the collected statuses, the configuration parameters associated with three-dimensional 3D rendering, pre-processing and video encoding of the graphics pipeline; and tune the graphics pipeline with the determined configuration parameters for processing a next frame.
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公开(公告)号:US20190261010A1
公开(公告)日:2019-08-22
申请号:US16342110
申请日:2016-11-21
Applicant: Intel Corporation
Inventor: Ning Luo , Changliang Wang , Bo Zhao , Yue Xiong
IPC: H04N19/423 , H04N19/119 , H04N19/40 , H04N19/186 , H04N19/176
Abstract: Methods, systems, and articles of video coding with reduced supporting data sideband buffer usage.
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公开(公告)号:US10979630B2
公开(公告)日:2021-04-13
申请号:US16696749
申请日:2019-11-26
Applicant: Intel Corporation
Inventor: Yunbiao Lin , Jianhui Dai , Ning Luo , Chunbo Chen
Abstract: Techniques are disclosed to control a camera device such that memory contention and power consumption is reduced during video processing routines, generally referred to herein as media tasks. In particular, a workload scheduler is implemented in a camera HAL and is configured to dispatch captured image frames in an alternating manner between competing media tasks such that the processing of those image frames is performed sequentially, and thus, eliminates or otherwise mitigates memory contention. To this end, techniques variously disclosed herein can be used to enable low-cost, low-memory configured devices to perform concurrent media tasks on captured high-definition video at high framerates, without an undesirable decrease in performance and an increase in power consumption.
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公开(公告)号:US10484690B2
公开(公告)日:2019-11-19
申请号:US15570575
申请日:2015-06-04
Applicant: INTEL CORPORATION
Inventor: Ning Luo , Changliang Wang , Bo Zhao , Yue Xiong
IPC: H04N19/156 , H04N19/127 , H04N19/177
Abstract: Techniques related to compositing video content are discussed. Such techniques may include generating transparency data for a surface of first video content and storing it in a stream out buffer, accessing the transparency data via the stream out buffer when there is no change to the surface of the first video content, and compositing the first video content with second video content based on the accessed transparency data.
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公开(公告)号:US20240203025A1
公开(公告)日:2024-06-20
申请号:US18460183
申请日:2023-09-01
Applicant: Intel Corporation
Inventor: Linlin Zhang , Ning Luo , Changliang Wang , Yi Qian , Zhisheng Zhou
IPC: G06T15/00 , H04N13/366
CPC classification number: G06T15/005 , H04N13/366 , H04N2013/0092
Abstract: The disclosure relates to content aware foveated ASW for low latency rendering. A device for graphics processing comprises processing resources and a pipeline at least partly implemented by the processing resources. The pipeline is to: render input data to generate a first frame; perform ASW on the first frame on a block basis based on content and focusing related information associated with the first frame to generate a second frame; and output the first frame and the second frame.
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公开(公告)号:US11595650B2
公开(公告)日:2023-02-28
申请号:US16490149
申请日:2017-03-31
Applicant: Intel Corporation
Inventor: Ning Luo , Changliang Wang , Ujwal Paidipathi , Karthik Veeramani , Rajneesh Chowdhury
IPC: H04N19/12 , H04N19/105 , H04N19/139 , H04N19/187
Abstract: Systems, apparatuses, and methods may provide for multi-session encoding to optimize multiple encoding sessions on Wi-Fi display (WFD) source devices when the WFD source devices are connected to multiple sink devices. The multiple encoding sessions may be optimized with encoding hints that are generated by a compositor and transmitted to a pre-encoding checking device. The encoding session that has the highest encoding resolution is subjected to hierarchical motion estimation (HME) processing, and the encoding sessions that have lower resolutions are optimized based on a motion vector prediction hint generated by the encoding session that has the highest encoding resolution and a scaling factor.
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公开(公告)号:US20210344918A1
公开(公告)日:2021-11-04
申请号:US16490149
申请日:2017-03-31
Applicant: Intel Corporation
Inventor: Ning Luo , Changliang Wang , Ujwal Paidipathi , Karthik Veeramani , Rajneesh Chowdhury
IPC: H04N19/12 , H04N19/139 , H04N19/105 , H04N19/187
Abstract: Systems, apparatuses, and methods may provide for multi-session encoding to optimize multiple encoding sessions on Wi-Fi display (WFD) source devices when the WFD source devices are connected to multiple sink devices. The multiple encoding sessions may be optimized with encoding hints that are generated by a compositor and transmitted to a pre-encoding checking device. The encoding session that has the highest encoding resolution is subjected to hierarchical motion estimation (HME) processing, and the encoding sessions that have lower resolutions are optimized based on a motion vector prediction hint generated by the encoding session that has the highest encoding resolution and a scaling factor.
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公开(公告)号:US10115377B2
公开(公告)日:2018-10-30
申请号:US15117625
申请日:2015-09-24
Applicant: INTEL CORPORATION
Inventor: Ning Luo , Changliang Wang , Penne Y. Lee
IPC: G06F13/00 , G09G5/395 , H04N19/423 , H04N19/50 , H04N19/44
Abstract: Techniques are disclosed for video playback decoding surface prediction. For instance, in some embodiments, video content may be parsed for information that can be used to predict what surfaces (e.g., computer graphics shapes to be rendered, as defined by vertices specifying the location and possibly other attributes of the shape) are most likely to be accessed, for example, by a display or a graphics processing unit (GPU) in the near future. In accordance with some embodiments, these surfaces may be pre-loaded, for example, into cache memory or other desired high-bandwidth memory in advance to minimize or otherwise reduce memory access latency. In some cases, these surfaces may be entered in a list that is kept updated with each new input frame, and the surfaces in that list may be kept inside the cache (or other high-bandwidth memory) for future display or GPU access.
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