SEMICONDUCTOR POWER DEVICE
    1.
    发明申请

    公开(公告)号:US20250072032A1

    公开(公告)日:2025-02-27

    申请号:US18484430

    申请日:2023-10-10

    Abstract: A semiconductor power device includes a substrate, a channel layer, a barrier layer, a gate, a source, and a drain. The channel layer is located on the substrate. The barrier layer is located on the channel layer and includes a first region and a second region outside the first region. There is a first compound in the first region and a second compound in the second region. The first compound and the second compound each have an aluminum atom of a different ratio, and the aluminum composition ratio of the first compound is less than the aluminum composition ratio of the second compound. The ratio consists of a plurality of different atoms in the first compound and the second compound.

    SEMICONDUCTOR DEVICE
    2.
    发明公开

    公开(公告)号:US20240154008A1

    公开(公告)日:2024-05-09

    申请号:US18151487

    申请日:2023-01-09

    CPC classification number: H01L29/408 H01L29/1608 H01L29/66068 H01L29/7813

    Abstract: Provided is a semiconductor device including a substrate, a channel layer, a gate structure, a first doped region, a second doped region, a third doped region and a channel cap layer. The channel layer is located on the substrate. The channel layer has a trench. The gate structure is disposed in the trench. The first doped region and the second doped region are located in the channel layer on two sides of the gate structure. The third doped region is located in the substrate below the channel layer. The channel cap layer is located between the gate structure and the first doped region, between the gate structure and the second doped region, and between the gate structure and the channel layer. An energy band gap of the channel cap layer is larger than an energy band gap of the channel layer.

    SEMICONDUCTOR DEVICE
    3.
    发明申请

    公开(公告)号:US20250031427A1

    公开(公告)日:2025-01-23

    申请号:US18402748

    申请日:2024-01-03

    Abstract: A semiconductor device includes a substrate, a dummy gate structure, and a gate structure. The substrate has a dummy gate trench and a gate trench, and includes a first well region, a second well region and a source region. The first well region is formed by doping at least one element from a first element group, and has a first conductive channel. The second well region is formed by doping at least one element from a second element group, the second well region is on the first well region and has a second conductive channel, a polarity of the second conductive channel is opposite to that of the first conductive channel. The dummy gate structure is in the dummy gate trench of the substrate, and a portion of the dummy gate structure is in the first well region. The gate structure is between the adjacent dummy gate structures.

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