公开(公告)号：US11569238B2

公开(公告)日：2023-01-31

申请号：US16222940

申请日：2018-12-17

Applicant: Intel Corporation

Inventor： Aaron Lilak ,  Willy Rachmady ,  Gilbert Dewey ,  Kimin Jun ,  Hui Jae Yoo ,  Patrick Morrow ,  Sean T. Ma ,  Ahn Phan ,  Abhishek Sharma ,  Cheng-Ying Huang ,  Ehren Mannebach

IPC: H01L29/66 ,  H01L21/336 ,  H01L27/108 ,  H01L49/02 ,  H01L29/423 ,  H01L23/528 ,  H01L29/786 ,  H01L29/06 ,  H01L29/49 ,  H01L29/10 ,  H01L29/417 ,  H01L29/51

Abstract: Embodiments herein describe techniques for a semiconductor device including a memory cell vertically above a substrate. The memory cell includes a metal-insulator-metal (MIM) capacitor at a lower device portion, and a transistor at an upper device portion above the lower device portion. The MIM capacitor includes a first plate, and a second plate separated from the first plate by a capacitor dielectric layer. The first plate includes a first group of metal contacts coupled to a metal electrode vertically above the substrate. The first group of metal contacts are within one or more metal layers above the substrate in a horizontal direction in parallel to a surface of the substrate. Furthermore, the metal electrode of the first plate of the MIM capacitor is also a source electrode of the transistor. Other embodiments may be described and/or claimed.