公开(公告)号：US20240213131A1

公开(公告)日：2024-06-27

申请号：US18089499

申请日：2022-12-27

Applicant: Intel Corporation

Inventor： Yi YANG ,  Andrew WENTZEL ,  Marcel WALL ,  Suddhasattwa NAD

IPC: H01L23/498 ,  C25D3/38 ,  C25D7/12 ,  C25D17/00 ,  H01L23/15

CPC classification number: H01L23/49827 ,  C25D3/38 ,  C25D7/12 ,  C25D17/001 ,  H01L23/15 ,  H01L24/16 ,  H01L2224/16225

Abstract: In an embodiment, a package substrate is described. In an embodiment, the package substrate comprises a layer, where the layer is a dielectric material. In an embodiment, a via opening is provided through a thickness of the layer. In an embodiment, a conductive via is in the via opening, where the conductive via has a substantially uniform composition throughout a thickness of the conductive via. In an embodiment the conductive via directly contacts the layer.