公开(公告)号：US12259777B2

公开(公告)日：2025-03-25

申请号：US17348435

申请日：2021-06-15

Applicant: Intel Corporation

Inventor： Shen Zhou ,  Xiaoming Du ,  Cong Li ,  Kuljit S. Bains ,  Rajat Agarwal ,  Murugasamy K. Nachimuthu ,  Maciej Lawniczak ,  Chao Yan Tang ,  Mariusz Oriol

IPC: G06F11/07 ,  G11C29/44 ,  G11C29/52

Abstract: A system can predict memory device failure through identification of correctable error patterns based on the memory architecture. The failure prediction can thus account for the circuit-level of the memory rather than the mere number or frequency of correctable errors. A failure prediction engine correlates hardware configuration of the memory device with correctable errors (CEs) detected in data of the memory device to predict an uncorrectable error (UE) based on the correlation.