公开(公告)号：US20210305358A1

公开(公告)日：2021-09-30

申请号：US16828497

申请日：2020-03-24

Applicant: Intel Corporation

Inventor： Sudipto NASKAR ,  Manish CHANDHOK ,  Abhishek A. SHARMA ,  Roman CAUDILLO ,  Scott B. CLENDENNING ,  Cheyun LIN

IPC: H01L49/02 ,  H01L27/108

Abstract: Embodiments herein describe techniques for a semiconductor device including a three dimensional capacitor. The three dimensional capacitor includes a pole, and one or more capacitor units stacked around the pole. A capacitor unit of the one or more capacitor units includes a first electrode surrounding and coupled to the pole, a dielectric layer surrounding the first electrode, and a second electrode surrounding the dielectric layer. Other embodiments may be described and/or claimed.

公开(公告)号：US20220140069A1

公开(公告)日：2022-05-05

申请号：US17578839

申请日：2022-01-19

Applicant: Intel Corporation

Inventor： Sudipto NASKAR ,  Manish CHANDHOK ,  Abhishek A. SHARMA ,  Roman CAUDILLO ,  Scott B. CLENDENNING ,  Cheyun LIN

IPC: H01L49/02 ,  H01L27/108

Abstract: Embodiments herein describe techniques for a semiconductor device including a three dimensional capacitor. The three dimensional capacitor includes a pole, and one or more capacitor units stacked around the pole. A capacitor unit of the one or more capacitor units includes a first electrode surrounding and coupled to the pole, a dielectric layer surrounding the first electrode, and a second electrode surrounding the dielectric layer. Other embodiments may be described and/or claimed.

公开(公告)号：US20220140068A1

公开(公告)日：2022-05-05

申请号：US17578043

申请日：2022-01-18

Applicant: Intel Corporation

Inventor： Sudipto NASKAR ,  Manish CHANDHOK ,  Abhishek A. SHARMA ,  Roman CAUDILLO ,  Scott B. CLENDENNING ,  Cheyun LIN

IPC: H01L49/02 ,  H01L27/108

Abstract: Embodiments herein describe techniques for a semiconductor device including a three dimensional capacitor. The three dimensional capacitor includes a pole, and one or more capacitor units stacked around the pole. A capacitor unit of the one or more capacitor units includes a first electrode surrounding and coupled to the pole, a dielectric layer surrounding the first electrode, and a second electrode surrounding the dielectric layer. Other embodiments may be described and/or claimed.