Invention Application
- Patent Title: CAPACITOR ARCHITECTURES IN SEMICONDUCTOR DEVICES
-
Application No.: US17578839Application Date: 2022-01-19
-
Publication No.: US20220140069A1Publication Date: 2022-05-05
- Inventor: Sudipto NASKAR , Manish CHANDHOK , Abhishek A. SHARMA , Roman CAUDILLO , Scott B. CLENDENNING , Cheyun LIN
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L49/02
- IPC: H01L49/02 ; H01L27/108

Abstract:
Embodiments herein describe techniques for a semiconductor device including a three dimensional capacitor. The three dimensional capacitor includes a pole, and one or more capacitor units stacked around the pole. A capacitor unit of the one or more capacitor units includes a first electrode surrounding and coupled to the pole, a dielectric layer surrounding the first electrode, and a second electrode surrounding the dielectric layer. Other embodiments may be described and/or claimed.
Public/Granted literature
- US11791375B2 Capacitor architectures in semiconductor devices Public/Granted day:2023-10-17
Information query
IPC分类: