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公开(公告)号:US20180095681A1
公开(公告)日:2018-04-05
申请号:US15282463
申请日:2016-09-30
Applicant: Intel Corporation
Inventor: Robert C. Swanson , Tony S. Baker , Theodros Yigzaw , Chris Ackles , Celeste M. Brown
CPC classification number: G06F11/1417 , G06F11/0778 , G06F11/0787 , G11C13/0004
Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to utilize non-volatile random access memory for information storage in response to error conditions are disclosed. Example methods disclosed herein include accessing, with a power control unit associated with a processor, first information describing available capacities of respective reserved regions of a plurality of non-volatile memory modules, the respective reserved regions of the non-volatile memory modules being separate from respective host-visible regions of the non-volatile memory modules. Disclosed example methods also include configuring, with the power control unit, an information storage architecture based on the first information. Disclosed example methods further include storing, with the power control unit, second information in one or more of the respective reserved regions of the non-volatile memory modules in accordance with the information storage architecture.
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公开(公告)号:US10157005B2
公开(公告)日:2018-12-18
申请号:US15282463
申请日:2016-09-30
Applicant: Intel Corporation
Inventor: Robert C. Swanson , Tony S. Baker , Theodros Yigzaw , Chris Ackles , Celeste M. Brown
Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to utilize non-volatile random access memory for information storage in response to error conditions are disclosed. Example methods disclosed herein include accessing, with a power control unit associated with a processor, first information describing available capacities of respective reserved regions of a plurality of non-volatile memory modules, the respective reserved regions of the non-volatile memory modules being separate from respective host-visible regions of the non-volatile memory modules. Disclosed example methods also include configuring, with the power control unit, an information storage architecture based on the first information. Disclosed example methods further include storing, with the power control unit, second information in one or more of the respective reserved regions of the non-volatile memory modules in accordance with the information storage architecture.
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