公开(公告)号：US20230118802A1

公开(公告)日：2023-04-20

申请号：US17929023

申请日：2020-03-13

Applicant: Intel Corporation

Inventor： Jiong Gong ,  Yong Wu ,  Haihao Shen ,  Xiao Dong Lin ,  Guoming Zhang ,  Feng Yuan

IPC: G06N3/0495 ,  G06N3/08

Abstract: Systems, apparatuses and methods may provide technology for optimizing an inference neural network model that performs asymmetric quantization by generating a quantized neural network, wherein model weights of the neural network are quantized as signed integer values, and wherein an input layer of the neural network is configured to quantize input values as unsigned integer values, generating a weights accumulation table based on the quantized model weights and a kernel size for the neural network, and generating an output restoration function for an output layer of the neural network based on the weights accumulation table and the kernel size. The technology may also perform per-input channel quantization. The technology may also perform mixed-precision auto-tuning.

公开(公告)号：US11907118B2

公开(公告)日：2024-02-20

申请号：US17054083

申请日：2019-11-07

Applicant: Intel Corporation

Inventor： Yong Wu ,  Mohammad Haghighat ,  Zhong Cao ,  Feng Yuan ,  Hongzhen Liu

IPC: G06F12/06 ,  G06F9/30

CPC classification number: G06F12/0607 ,  G06F9/3001 ,  G06F2212/251

Abstract: Method, systems and apparatuses may provide for technology that identifies first data and second data to be stored in a data storage. Each of the first data and the second data are in a first data format. Some technology may also interleave the first data with the second data. The interleaved first and second data are in a second data format. The second data format is different from the first data format.

公开(公告)号：US11748952B2

公开(公告)日：2023-09-05

申请号：US16642894

申请日：2017-09-27

Applicant: Intel Corporation

Inventor： Feng Yuan ,  Wei Zong ,  Juan Zhao ,  Junkai Wu

IPC: G06T19/00 ,  G06T7/246 ,  G06T3/40 ,  G06T5/50

CPC classification number: G06T19/006 ,  G06T3/4038 ,  G06T5/50 ,  G06T7/248 ,  G06T2207/20212

Abstract: An apparatus and method for efficient image optimized image stitching. For example, one embodiment of an apparatus comprises: feature search area identification circuitry/logic to narrow down a feature search area based on possible overlap between two image frames; feature detection circuitry/logic to identify a plurality of feature points in a first image frame of the two image frames; feature matching circuitry/logic to map one or more of the plurality of feature points from the first image frame to corresponding feature points in the right image frame; image frame stitching and blending circuitry/logic to stitch the first image frame and second image frame based on the mapping of the feature points between the two image frames and to blend a portion of the first image frame with a portion of the second image frame.

公开(公告)号：US20230153240A1

公开(公告)日：2023-05-18

申请号：US17054083

申请日：2019-11-07

Applicant: Intel Corporation

Inventor： Yong Wu ,  Mohammad Haghighat ,  Zhong Cao ,  Feng Yuan ,  Hongzhen Liu

IPC: G06F12/06 ,  G06F9/30

CPC classification number: G06F12/0607 ,  G06F9/3001 ,  G06F2212/251

Abstract: Method, systems and apparatuses may provide for technology that identifies first data and second data to be stored in a data storage. Each of the first data and the second data are in a first data format. Some technology may also interleave the first data with the second data. The interleaved first and second data are in a second data format. The second data format is different from the first data format.