公开(公告)号：US20190095571A1

公开(公告)日：2019-03-28

申请号：US15718685

申请日：2017-09-28

Applicant: Intel Corporation

Inventor： Ning Cheng ,  Xiangyong Wang ,  Mahesh A. Iyer

IPC: G06F17/50

Abstract: An integrated circuit with programmable logic circuitry is provided. The integrated circuit may include quiet regions, toggling regions, or unused regions. An integrated circuit may also include heavily-used metal routing paths, lightly-used metal routing paths, and unused metal routing paths. Circuit design tools may be used to generate multiple configuration images that replace the quiet regions with toggling or unused regions, that swap the heavily-used metal routing paths with lightly-used or unused metal routing paths, or that use random fitter seeds of improve the usage coverage to statistically reduce the always quiet regions on the integrated circuit. The multiple configuration images implement the same design and can be used to reconfigure the integrated circuit upon startup to reduce aging effects and improve circuit performance.

公开(公告)号：US11113442B2

公开(公告)日：2021-09-07

申请号：US15718685

申请日：2017-09-28

Applicant: Intel Corporation

Inventor： Ning Cheng ,  Xiangyong Wang ,  Mahesh A. Iyer

IPC: G06F30/00 ,  G06F30/392 ,  G06F30/34 ,  G06F30/394 ,  G06F30/398 ,  G06F119/04

Abstract: An integrated circuit with programmable logic circuitry is provided. The integrated circuit may include quiet regions, toggling regions, or unused regions. An integrated circuit may also include heavily-used metal routing paths, lightly-used metal routing paths, and unused metal routing paths. Circuit design tools may be used to generate multiple configuration images that replace the quiet regions with toggling or unused regions, that swap the heavily-used metal routing paths with lightly-used or unused metal routing paths, or that use random fitter seeds of improve the usage coverage to statistically reduce the always quiet regions on the integrated circuit. The multiple configuration images implement the same design and can be used to reconfigure the integrated circuit upon startup to reduce aging effects and improve circuit performance.

公开(公告)号：US20210383049A1

公开(公告)日：2021-12-09

申请号：US17406534

申请日：2021-08-19

Applicant: Intel Corporation

Inventor： Ning Cheng ,  Xiangyong Wang ,  Mahesh A. Iyer

IPC: G06F30/392 ,  G06F30/34 ,  G06F30/394 ,  G06F30/398

Abstract: An integrated circuit with programmable logic circuitry is provided. The integrated circuit may include quiet regions, toggling regions, or unused regions. An integrated circuit may also include heavily-used metal routing paths, lightly-used metal routing paths, and unused metal routing paths. Circuit design tools may be used to generate multiple configuration images that replace the quiet regions with toggling or unused regions, that swap the heavily-used metal routing paths with lightly-used or unused metal routing paths, or that use random fitter seeds of improve the usage coverage to statistically reduce the always quiet regions on the integrated circuit. The multiple configuration images implement the same design and can be used to reconfigure the integrated circuit upon startup to reduce aging effects and improve circuit performance.

公开(公告)号：US10541205B1

公开(公告)日：2020-01-21

申请号：US15432823

申请日：2017-02-14

Applicant: Intel Corporation

Inventor： Ning Cheng ,  Fangyun Richter ,  Andy Louie Lee

IPC: H01L23/00 ,  H01L21/28 ,  H01L27/115 ,  H01L23/528 ,  H01L23/48 ,  H01L21/768 ,  H01L21/48

Abstract: Fabrication methods for monolithic dies that integrate multiple integrated circuits, such as System-on-Chips are described. A substrate having an interconnect may be coupled via electrical terminations to the integrated circuits. Fabrication methods provide multiple electrical termination regions on a surface, with each region having geometrical properties that are appropriate for the coupled integrated circuit. Electrical terminations with different directions may be produced employing a single reactive ion etching process under conditions that enhance micro loading effects during fabrication.