BUFFER THAT SUPPORTS BURST TRANSFERS HAVING PARALLEL CRC AND DATA TRANSMISSIONS

    公开(公告)号:US20210279128A1

    公开(公告)日:2021-09-09

    申请号:US17327432

    申请日:2021-05-21

    Abstract: A method is described. The method includes a buffer semiconductor chip receiving a plurality of data signals. The method includes the buffer chip calculating first CRC information from the plurality of data signals. The method includes the buffer chip transmitting the plurality of data signals in parallel with the first CRC information if a read burst transfer sequence is being performed, the buffer chip receiving second CRC information in parallel with the plurality of data signals and comparing the first CRC information with the second CRC information if a write burst transfer sequence is being performed.

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