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公开(公告)号:US20240008316A1
公开(公告)日:2024-01-04
申请号:US18343759
申请日:2023-06-29
Applicant: Japan Display Inc.
Inventor: Shinichi KAWAMURA , Nobuo IMAI , Hiroshi OGAWA
IPC: H10K59/122 , H10K59/80
CPC classification number: H10K59/122 , H10K59/8051 , H10K59/8052 , H10K71/231
Abstract: According to one embodiment, a display device comprises a first lower electrode, a rib including a first pixel aperture, a partition including a lower portion on the rib and an upper portion protruding from a side surface of the lower portion, a first upper electrode, and a first organic layer between the first lower electrode and the first upper electrode. The lower portion includes a bottom layer and a stem layer on the bottom layer. The bottom layer is formed of a material which has a smaller etching rate to a mixed acid containing phosphoric acid, nitric acid, and acetic acid than the stem layer and which is conductive.
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公开(公告)号:US20160268398A1
公开(公告)日:2016-09-15
申请号:US15049469
申请日:2016-02-22
Applicant: Japan Display Inc.
Inventor: Shinichi KAWAMURA
IPC: H01L29/66 , H01L21/033 , H01L21/266
CPC classification number: H01L29/66742 , H01L21/266 , H01L21/32139 , H01L29/66492
Abstract: According to one embodiment, a method of manufacturing a semiconductor device comprises forming a semiconductor layer on a substrate, forming a first insulating film on the semiconductor layer, forming a metal layer on the first insulating film, forming a first portion and a second portion in the metal layer, implanting an impurity into the semiconductor layer by using the first portion and the second portion as masks, forming a gate electrode by reducing the second portion in addition to removing the first portion, and implanting an impurity into the semiconductor layer by using the gate electrode as a mask.
Abstract translation: 根据一个实施例,制造半导体器件的方法包括在衬底上形成半导体层,在半导体层上形成第一绝缘膜,在第一绝缘膜上形成金属层,在第一绝缘膜上形成第一部分和第二部分 金属层,通过使用第一部分和第二部分作为掩模将杂质注入到半导体层中,除了除去第一部分之外还通过减少第二部分形成栅电极,并且通过使用将杂质注入到半导体层中 栅电极作为掩模。
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公开(公告)号:US20250089466A1
公开(公告)日:2025-03-13
申请号:US18818698
申请日:2024-08-29
Applicant: Japan Display Inc.
Inventor: Takahiro USHIKUBO , Hiroyuki KIMURA , Arichika ISHIDA , Kaichi FUKUDA , Shinichi KAWAMURA , Takanobu TAKENAKA
IPC: H10K59/122 , H10K59/12
Abstract: According to one embodiment, a display device includes a lower electrode, a partition which has a conductive lower portion and an upper portion provided on the lower portion and protruding from a side surface of the lower portion, an organic layer provided on the lower electrode, and an upper electrode provided on the organic layer. The organic layer has a hole injection layer spaced apart from the partition, a first intermediate layer including a first light emitting layer, a first charge generation layer spaced apart from the partition, and a second intermediate layer including a second light emitting layer. The hole injection layer and the first charge generation layer are spaced apart from each other and are further spaced apart from the upper electrode.
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公开(公告)号:US20240334748A1
公开(公告)日:2024-10-03
申请号:US18592498
申请日:2024-02-29
Applicant: Japan Display Inc.
Inventor: Shinichi KAWAMURA
IPC: H10K59/122 , G09G3/3225
CPC classification number: H10K59/122 , G09G3/3225 , G09G2300/0452 , G09G2300/0842
Abstract: According to one embodiment, a display device includes a lower electrode, a rib including a pixel aperture, a partition which includes a conductive bottom portion, a stem portion and a top portion, an organic layer which covers the lower electrode through the pixel aperture, and an upper electrode which covers the organic layer. The partition includes a first portion extending in a first direction. The bottom portion of the first portion includes a first end portion on a pixel aperture side, and a second end portion located on a side opposite to the first end portion. Further, the first end portion is exposed from the stem portion. The second end portion is covered with the stem portion.
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公开(公告)号:US20240224617A1
公开(公告)日:2024-07-04
申请号:US18607569
申请日:2024-03-18
Applicant: Japan Display Inc.
Inventor: Shinichi KAWAMURA , Nobuo IMAI , Hiroshi OGAWA
IPC: H10K59/122 , H10K59/80 , H10K71/20 , H10K102/00
CPC classification number: H10K59/122 , H10K59/8051 , H10K59/8052 , H10K71/231 , H10K2102/351
Abstract: According to one embodiment, a display device comprises a first lower electrode, a rib including a first pixel aperture, a partition including a lower portion on the rib and an upper portion protruding from a side surface of the lower portion, a first upper electrode, and a first organic layer between the first lower electrode and the first upper electrode. The lower portion includes a bottom layer and a stem layer on the bottom layer. The bottom layer is formed of a material which has a smaller etching rate to a mixed acid containing phosphoric acid, nitric acid, and acetic acid than the stem layer and which is conductive.
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公开(公告)号:US20240179960A1
公开(公告)日:2024-05-30
申请号:US18498048
申请日:2023-10-31
Applicant: Japan Display Inc.
Inventor: Shinichi KAWAMURA
IPC: H10K59/123 , H10K59/12 , H10K59/122
CPC classification number: H10K59/123 , H10K59/1201 , H10K59/122
Abstract: According to one embodiment, a display device includes a circuit layer, an insulating layer comprising a contact hole, a lower electrode provided above the insulating layer and connected to the pixel circuit through the contact hole, a filling material inside the contact hole, a rib including a pixel aperture, a partition above the rib, an organic layer covering the lower electrode, and an upper electrode covering the organic layer. The rib and the partition overlap an entire of the contact hole as seen in plan view. A thickness of the filling material is less than a depth of the contact hole.
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公开(公告)号:US20240365599A1
公开(公告)日:2024-10-31
申请号:US18623155
申请日:2024-04-01
Applicant: Japan Display Inc.
Inventor: Shinichi KAWAMURA
IPC: H10K59/122 , H10K59/12 , H10K102/00 , H10K102/10
CPC classification number: H10K59/122 , H10K59/1201 , H10K2102/103 , H10K2102/351
Abstract: According to one embodiment, a display device includes a lower electrode, a rib which covers a first portion of the lower electrode and includes a pixel aperture overlapping a second portion of the lower electrode, a partition which includes a bottom portion disposed on the rib, an axis portion disposed on the bottom portion, and a top portion disposed on the axis portion and protruding from a side surface of the axis portion, an organic layer which covers the lower electrode through the pixel aperture and an upper electrode which covers the organic layer and is in contact with the bottom portion. The thickness of the first portion of the lower electrode is different from the thickness of the second portion of the lower electrode.
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公开(公告)号:US20240334767A1
公开(公告)日:2024-10-03
申请号:US18588013
申请日:2024-02-27
Applicant: Japan Display Inc.
Inventor: Shinichi KAWAMURA
IPC: H10K59/131 , H10K59/126 , H10K59/80 , H10K102/10
CPC classification number: H10K59/131 , H10K59/126 , H10K59/879 , H10K2102/103
Abstract: According to one embodiment, a display device includes a lower electrode, a rib having a pixel aperture, a partition including a conductive bottom portion, an insulating stem portion, and a top portion, an organic layer which covers the lower electrode through the pixel aperture, and an upper electrode which covers the organic layer and is in contact with the bottom portion. Further, the partition includes a first portion in which the bottom portion having a first thickness, the stem portion and the top portion are stacked, and a second portion in which the bottom portion having a second thickness less than the first thickness, the stem portion and the top portion are stacked.
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公开(公告)号:US20240196647A1
公开(公告)日:2024-06-13
申请号:US18534714
申请日:2023-12-11
Applicant: Japan Display Inc.
Inventor: Shinichi KAWAMURA
CPC classification number: H10K59/1201 , H10K71/10 , H10K71/231 , H10K71/60
Abstract: According to one embodiment, a manufacturing method includes forming a lower electrode, forming a rib, and forming a partition including a conductive bottom portion, an insulating stem portion, and a top portion. The formation of the partition includes forming a first layer including a layer of a conductive first material, forming a second layer including a layer of an insulating second material, forming a third layer including a layer of a third material, forming the top, stem and bottom portions by first to third etching processes, respectively. An etching rate of the third material in the second etching process is lower than an etching rate of the second material in the second etching process.
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公开(公告)号:US20240164153A1
公开(公告)日:2024-05-16
申请号:US18483535
申请日:2023-10-10
Applicant: Japan Display Inc.
Inventor: Shinichi KAWAMURA
IPC: H10K59/126 , H10K59/12 , H10K59/122 , H10K59/80
CPC classification number: H10K59/126 , H10K59/1201 , H10K59/122 , H10K59/873
Abstract: According to one embodiment, a mother substrate for a display device includes an insulating substrate including a first main surface and a second main surface, a conductive shielding layer provided in the first main surface or the second main surface, and first and second panel portions overlapping the shielding layer. Each of the first panel portion and the second panel portion includes a display area which displays an image and a surrounding area outside the display area. The shielding layer includes a first shielding portion overlapping the first panel portion, a second shielding portion overlapping the second panel portion, and a connection portion provided for connecting the first shielding portion to the second shielding portion and formed into a belt-like shape.
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