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    Inclusion of low-k dielectric material between bit lines
    1.
    发明授权
    Inclusion of low-k dielectric material between bit lines 有权
    在位线之间包含低k电介质材料

    公开(公告)号：US07125790B2

    公开(公告)日：2006-10-24

    申请号：US10689233

    申请日：2003-10-20

    申请人： Kia Seng Low ,  Larry Nesbit ,  George C. Feng

    发明人： Kia Seng Low ,  Larry Nesbit ,  George C. Feng

    IPC分类号： H01L21/4763

    CPC分类号： H01L27/10864 ,  H01L27/10885

    摘要： Low-k dielectric materials are incorporated as an insulator material between bit lines and an inter-level dielectric material. The device is first processed in a known manner, up to and including the deposition and anneal of the bit line metal, using a higher dielectric constant material that can withstand the higher temperature process steps as the insulator between the bit lines. Then, the higher dielectric constant material is removed using an etch that is selective to the bit line metal, and the low-k dielectric material is deposited. The low-k material may then be planarized to the top of the bit lines, and further low-k material deposited as an inter-level dielectric. Alternatively, sufficient low-k material is deposited in a single step to both fill the gaps between the bit lines as well as serve as an inter-level dielectric, and then the low-k dielectric material is planarized. Standard processing may then be carried out.

    摘要翻译： 低k电介质材料作为位线和层间电介质材料之间的绝缘体材料并入。 首先使用能够承受作为位线之间的绝缘体的较高温度工艺步骤的较高介电常数材料，以已知的方式处理器件，直到并包括位线金属的沉积和退火。 然后，使用对位线金属有选择性的蚀刻去除较高的介电常数材料，并沉积低介电常数材料。 然后可以将低k材料平面化到位线的顶部，并且将另外的低k材料沉积为层间电介质。 或者，在单个步骤中沉积足够的低k材料，以填充位线之间的间隙以及用作层间电介质，然后将低k电介质材料平坦化。 然后可以执行标准处理。

    Magnetic memory
    2.
    发明授权
    Magnetic memory 失效
    磁记忆

    公开(公告)号：US06768150B1

    公开(公告)日：2004-07-27

    申请号：US10249532

    申请日：2003-04-17

    申请人： Kia Seng Low ,  Joerg Dietrich Schmid

    发明人： Kia Seng Low ,  Joerg Dietrich Schmid

    IPC分类号： H01L2976

    CPC分类号： G11C11/16 ,  G11C17/16 ,  G11C29/832 ,  H01L27/222

    摘要： A magnetic memory cell is disclosed. The memory cell includes first conductor and second conductors coupled to first and second electrodes of a magnetic element. A plurality of memory cells is interconnected by first and second conductors to form a memory array or block. The second conductor is coupled to the second electrode via a conductive strap having a fuse portion. The fuse portion can be blown to sever the connection between the second conductor and magnetic element, Nitride.

    摘要翻译： 公开了磁存储单元。 存储单元包括耦合到磁性元件的第一和第二电极的第一导体和第二导体。 多个存储器单元通过第一和第二导体互连以形成存储器阵列或块。 第二导体经由具有熔丝部分的导电带耦合到第二电极。 熔断器部分可以被吹断，以切断第二导体和磁性元件氮化物之间的连接。