公开(公告)号：US20250054564A1

公开(公告)日：2025-02-13

申请号：US18795818

申请日：2024-08-06

Applicant: Kioxia Corporation

Inventor： Marie Takada ,  Masanobu Shirakawa ,  Naomi Takeda ,  Ryo Yamaki ,  Shogo Muto ,  Hideki Yamada

IPC: G11C29/52 ,  G11C29/02

Abstract: According to one embodiment, a memory system includes a memory chip and a memory controller. A first cell unit and a second cell unit are classified into a first group. A third cell unit is classified into a second group. The memory controller is configured to use a first correction amount of a read voltage when data of the first group is read and to use a second correction amount of the read voltage when data of the second group is read. When a time difference from a write operation of the first cell unit to the write operation of the second cell unit exceeds a reference value, the memory controller is configured to change a boundary position between the first group and the second group to between the first cell unit and the second cell unit, and to classify the second cell unit into the second group.