Abstract:
Discussed are a gate shift register and a flat panel display using the same. The flat panel display includes a display panel for displaying an image, a gate driver for driving a plurality of gate lines of the display panel, and a timing controller for outputting a gate start pulse and a plurality of clock pulses each having first to third voltages, to control the gate driver. The gate driver includes a gate shift register for generating scan pulses each having the first to third voltages, using the clock pulses, and supplying the generated scan pulses to the gate lines, respectively.
Abstract:
An array substrate for a liquid crystal display device and method of manufacturing the same are provided. The array substrate includes: a plurality of paired gate lines at a first distance from each other at a boundary between adjacent first regions on a substrate, including a display area including a plurality of first regions, each including two adjacent pixel regions, a gate insulating layer on the gate lines and including a gate contact hole exposing each of the gate lines, a plurality of data lines crossing the paired gate lines, the first regions located at each crossing, an auxiliary gate line parallel with the data lines and at a boundary between the two adjacent two pixel regions, and a thin film transistor in each of the pixel regions and connected to corresponding gate and data lines, wherein the auxiliary gate line contacts the corresponding gate line through the hole.