Patterned retarder type 3D display having irregular pattern black strips
    2.
    发明授权
    Patterned retarder type 3D display having irregular pattern black strips 有权
    带有不规则图案黑色条纹的图形延迟器型3D显示器

    公开(公告)号:US09244288B2

    公开(公告)日:2016-01-26

    申请号:US13718843

    申请日:2012-12-18

    Abstract: A patterned retarder type 3D display includes a display panel including a plurality of unit pixels disposed in a matrix manner and a black matrix, a patterned retarder including a plurality of unit retarder patterns disposed at every row of the plurality of the unit pixels and located in front of the display panel, and a black strip including a main strip disposed as to be overlapped with the black matrix, the black strip being disposed between two unit pixels neighboring in a vertical direction and having a width expanded in any one direction of an upside direction and a down side direction from a border line of the unit retarder pattern, wherein outer lines of the black strips disposed at the each unit pixel are irregularly disposed, wherein the main strip extends in a horizontal direction.

    Abstract translation: 图案化延迟器型3D显示器包括:显示面板,包括以矩阵方式布置的多个单位像素和黑矩阵;图案化延迟器,包括设置在所述多个单位像素的每一行的多个单位延迟器图案, 显示面板的前方,以及黑色条带,其包括设置成与黑色矩阵重叠的主条带,该黑色条带设置在垂直方向相邻的两个单位像素之间,并且具有在上侧的任何一个方向上扩展的宽度 方向和沿着单位延迟器图案的边界线的向下方向,其中设置在每个单位像素处的黑色条纹的外线不规则地布置,其中主条带沿水平方向延伸。

    Display device
    4.
    发明授权

    公开(公告)号:US11385515B2

    公开(公告)日:2022-07-12

    申请号:US17102208

    申请日:2020-11-23

    Abstract: Embodiments of the disclosure are related to display devices, a planarization layer disposed on a thin film transistor in a display panel is removed to form an opening in the planarization layer, and a top gate electrode is disposed in the opening of the planarization layer, thus a driving performance of the thin film transistor is enhanced while reducing a size of the thin film transistor disposed in the display panel. Furthermore, the top gate electrode is implemented using an electrode layer located on an upper layer of the planarization layer, the thin film transistor including double gate electrodes is implemented easily without an additional process.

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