公开(公告)号：US11778888B2

公开(公告)日：2023-10-03

申请号：US17121076

申请日：2020-12-14

Applicant: LG Display Co., Ltd.

Inventor： BoYoung Jung ,  Youngsun Jang ,  HongGyu Han ,  Taewon Lee

IPC: G09G3/3266 ,  H10K59/88 ,  G09G3/3275 ,  G09G3/3225 ,  H10K59/131 ,  H10K59/121 ,  H01L27/12

CPC classification number: H10K59/88 ,  G09G3/3225 ,  G09G3/3266 ,  G09G3/3275 ,  H10K59/1213 ,  H10K59/131 ,  H01L27/1214

Abstract: Disclosed is an electroluminescent display device comprising an active area for displaying an image, a dummy area provided in the periphery of the active area, wherein an image is not displayed in the dummy area, a scan line, an initializing line and an emission line arranged along a first direction in the dummy area, a high power source line and a data line arranged along a second direction, which intersects with the first direction, in the dummy area, and a plurality of thin film transistors disposed in the dummy area, wherein the plurality of thin film transistors include a driving thin film transistor, a switching thin film transistor provided to connect the driving thin film transistor and the data line with each other, and an operation control thin film transistor provided to connect the driving thin film transistor and the high power source line with each other, wherein the switching thin film transistor and the operation control thin film transistor are disconnected from each other.

公开(公告)号：US11315459B2

公开(公告)日：2022-04-26

申请号：US16039544

申请日：2018-07-19

Applicant: LG Display Co., Ltd.

Inventor： ChungSik Kong ,  HongGyu Han ,  MiHee Shin ,  SeWan Lee

IPC: G11C19/00 ,  G09G3/20 ,  G09G3/36 ,  G09G3/3266

Abstract: A display panel includes pixels connected to gate lines, and a gate driver that supplies a gate signal to at least one of the gate lines and includes a plurality of stages. Each stage includes a pull-up transistor to apply a turn-on voltage of a first clock signal to an output terminal responsive to a voltage at a Q-node, a pull-down transistor to apply a turn-off voltage to the output terminal responsive to a voltage at a QB-node that holds the turn-on voltage during a period in which the output terminal is applied the turn-off voltage, and a QB-node control unit to apply the turn-on voltage to the QB-node responsive to the first clock signal and a second clock signal in reverse-phase with the first clock signal. Accordingly, a display panel may include a gate driver that can set, reset, and hold the voltage at a QB-node.

公开(公告)号：US20190096306A1

公开(公告)日：2019-03-28

申请号：US16039544

申请日：2018-07-19

Applicant: LG Display Co., Ltd.

Inventor： ChungSik Kong ,  HongGyu Han ,  MiHee Shin ,  SeWan LEE

IPC: G09G3/20

Abstract: A display panel includes pixels connected to gate lines, and a gate driver that supplies a gate signal to at least one of the gate lines and includes a plurality of stages. Each stage includes a pull-up transistor to apply a turn-on voltage of a first clock signal to an output terminal responsive to a voltage at a Q-node, a pull-down transistor to apply a turn-off voltage to the output terminal responsive to a voltage at a QB-node that holds the turn-on voltage during a period in which the output terminal is applied the turn-off voltage, and a QB-node control unit to apply the turn-on voltage to the QB-node responsive to the first clock signal and a second clock signal in reverse-phase with the first clock signal. Accordingly, a display panel may include a gate driver that can set, reset, and hold the voltage at a QB-node.