公开(公告)号：US20220208062A1

公开(公告)日：2022-06-30

申请号：US17699040

申请日：2022-03-18

Applicant: LG Display Co., Ltd.

Inventor： ChungSik KONG ,  HongGyu HAN ,  MiHee SHIN ,  SeWan LEE

IPC: G09G3/20 ,  G09G3/36

Abstract: A display panel includes pixels connected to gate lines, and a gate driver that supplies a gate signal to at least one of the gate lines and includes a plurality of stages. Each stage includes a pull-up transistor to apply a turn-on voltage of a first clock signal to an output terminal responsive to a voltage at a Q-node, a pull-down transistor to apply a turn-off voltage to the output terminal responsive to a voltage at a QB-node that holds the turn-on voltage during a period in which the output terminal is applied the turn-off voltage, and a QB-node control unit to apply the turn-on voltage to the QB-node responsive to the first clock signal and a second clock signal in reverse-phase with the first clock signal. Accordingly, a display panel may include a gate driver that can set, reset, and hold the voltage at a QB-node.

公开(公告)号：US20190096306A1

公开(公告)日：2019-03-28

申请号：US16039544

申请日：2018-07-19

Applicant: LG Display Co., Ltd.

Inventor： ChungSik Kong ,  HongGyu Han ,  MiHee Shin ,  SeWan LEE

IPC: G09G3/20

Abstract: A display panel includes pixels connected to gate lines, and a gate driver that supplies a gate signal to at least one of the gate lines and includes a plurality of stages. Each stage includes a pull-up transistor to apply a turn-on voltage of a first clock signal to an output terminal responsive to a voltage at a Q-node, a pull-down transistor to apply a turn-off voltage to the output terminal responsive to a voltage at a QB-node that holds the turn-on voltage during a period in which the output terminal is applied the turn-off voltage, and a QB-node control unit to apply the turn-on voltage to the QB-node responsive to the first clock signal and a second clock signal in reverse-phase with the first clock signal. Accordingly, a display panel may include a gate driver that can set, reset, and hold the voltage at a QB-node.