Array substrate and method of fabricating the same
    1.
    发明授权
    Array substrate and method of fabricating the same 有权
    阵列基板及其制造方法

    公开(公告)号:US09508828B2

    公开(公告)日:2016-11-29

    申请号:US13875509

    申请日:2013-05-02

    CPC classification number: H01L29/66742 H01L27/1225 H01L27/1288 H01L29/7869

    Abstract: A method of fabricating an array substrate includes forming a first metal layer, a gate insulating material layer and an oxide semiconductor material layer on a substrate; heat-treating the substrate having the oxide semiconductor material layer at a temperature of about 300 degrees Celsius to about 500 degrees Celsius; patterning the oxide semiconductor material layer, the gate insulating material layer and the first metal layer, thereby forming a gate electrode, a gate insulating layer and an oxide semiconductor layer; forming a gate line connected to the gate electrode and made of low resistance metal material; forming source and drain electrodes, a data line and a pixel electrode, the source and drain electrodes and the data line having a double-layered structure of a transparent conductive material layer and a low resistance metal material layer, the pixel electrode made of the transparent conductive material layer.

    Abstract translation: 制造阵列基板的方法包括在基板上形成第一金属层,栅绝缘材料层和氧化物半导体材料层; 在约300摄氏度至约500摄氏度的温度下热处理具有氧化物半导体材料层的衬底; 图案化氧化物半导体材料层,栅极绝缘材料层和第一金属层,从而形成栅电极,栅极绝缘层和氧化物半导体层; 形成连接到栅电极并由低电阻金属材料制成的栅极线; 形成源极和漏极,数据线和像素电极,源极和漏极以及具有透明导电材料层和低电阻金属材料层的双层结构的数据线,由透明 导电材料层。

    ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME
    2.
    发明申请
    ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
    阵列基板及其制造方法

    公开(公告)号:US20130292768A1

    公开(公告)日:2013-11-07

    申请号:US13875509

    申请日:2013-05-02

    CPC classification number: H01L29/66742 H01L27/1225 H01L27/1288 H01L29/7869

    Abstract: A method of fabricating an array substrate includes forming a first metal layer, a gate insulating material layer and an oxide semiconductor material layer on a substrate; heat-treating the substrate having the oxide semiconductor material layer at a temperature of about 300 degrees Celsius to about 500 degrees Celsius; patterning the oxide semiconductor material layer, the gate insulating material layer and the first metal layer, thereby forming a gate electrode, a gate insulating layer and an oxide semiconductor layer; forming a gate line connected to the gate electrode and made of low resistance metal material; forming source and drain electrodes, a data line and a pixel electrode, the source and drain electrodes and the data line having a double-layered structure of a transparent conductive material layer and a low resistance metal material layer, the pixel electrode made of the transparent conductive material layer.

    Abstract translation: 制造阵列基板的方法包括在基板上形成第一金属层,栅绝缘材料层和氧化物半导体材料层; 在约300摄氏度至约500摄氏度的温度下热处理具有氧化物半导体材料层的衬底; 图案化氧化物半导体材料层,栅极绝缘材料层和第一金属层,从而形成栅电极,栅极绝缘层和氧化物半导体层; 形成连接到栅电极并由低电阻金属材料制成的栅极线; 形成源极和漏极,数据线和像素电极,源极和漏极以及具有透明导电材料层和低电阻金属材料层的双层结构的数据线,由透明 导电材料层。

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