Abstract:
Discussed are a current sensing circuit capable of compensating for degradation of an organic light emitting diode by sensing a current of the organic light emitting diode, and an organic light emitting diode display having the same. The current sensing circuit according to an embodiment includes a plurality of sensing modules configured to sense a pixel current from a display panel having an organic light emitting diode on each of a plurality of pixels, and to output a sensing voltage according to a sensing result; and an analogue-digital converter configured to convert the sensing voltage into an analogue-digital voltage, and to output sensing data.
Abstract:
A display device includes a substrate on which a plurality of sub pixels are defined, each sub pixel having an emitting area and a non-emitting area. The display device further includes a thin film transistor disposed in each of the plurality of sub pixels, a planarization layer disposed on the thin film transistor and including a first opening disposed in at least one of the emitting areas, a first electrode disposed on an upper surface of the planarization layer and the first opening in at least one of the plurality of sub pixels and connected to the thin film transistor, and a bank exposing a part of the first electrode on the planarization layer and defining the emitting area. The first electrode includes a first convex and concave pattern formed in an area at the first opening.
Abstract:
A gate driver and a display device comprising the same are discussed. The gate driver can comprise a plurality of stages for individually driving a plurality of gate lines by a combination of a plurality of group signals, a plurality of block signals, and a plurality of clock signals. Each of the plurality of stages driven independently can include an output buffer including a pull-up transistor configured to generate and output a gate-on level of a scan signal under the control of a first node, and a pull-down transistor configured to generate and output a gate-off level of the scan signal under the control of a second node. Each stage can further include a first controller configured to control the first node, and a second controller configured to control the second node to be opposite to the operation of the first node.