公开(公告)号：US10672324B2

公开(公告)日：2020-06-02

申请号：US16107276

申请日：2018-08-21

Applicant: LG DISPLAY CO., LTD.

Inventor： ChungSik Kong ,  MiHee Shin ,  GyuTae Kang

IPC: G09G3/36 ,  G09G3/30 ,  G09G3/3266

Abstract: An electroluminescent display device includes sub-pixels connected to gate lines, and a gate driver configured to supply a scan signal to at least one of the gate lines, and including stages. One of the stages includes a QB-node regulation unit configured to charge a QB-node and a QP-node to turn-on voltage by using a first gate clock signal and a second gate clock signal, and a pull-down unit configured to output a turn-off voltage in response to a voltage of the QP-node. The QB-node regulation unit includes a QP-node control part configured to invert a phase of a voltage of a Q1-node and apply the voltage of the inverted phase to the QP-node, and a QB-node control part configured to bootstrap the QP-node. Accordingly, by employing the gate driver including the QB-node regulation unit that provides a stable voltage to the QB-node and the QP-node, the reliability of the gate driver can be improved, and the bezel of the electroluminescence display device can be reduced.

公开(公告)号：US09431438B2

公开(公告)日：2016-08-30

申请号：US14847846

申请日：2015-09-08

Applicant: LG DISPLAY CO., LTD.

Inventor： MiHee Shin ,  TaeSang Kim ,  MinGyeong Kim

IPC: H01L29/78 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L21/4763

CPC classification number: H01L27/1296 ,  G02F1/13452 ,  G02F1/13454 ,  G02F1/136204 ,  G02F1/136286 ,  H01L21/47635 ,  H01L27/124 ,  H01L29/66969 ,  H01L29/7869

Abstract: A display device according to an embodiment includes a plurality of driving blocks including a plurality of gate lines and a gate shorting structure spaced apart from the gate lines by an amount equal to a trimming region; an equipotential line extending from one of the driving blocks to an adjacent driving block, part of which is removed by the amount equal to the trimming region; a gate dummy line extending from at least one of the driving blocks; a plurality of data lines intersecting the gate lines; and an active layer disposed between the gate dummy line and the data lines, wherein some part of the active layer that overlaps the gate dummy line but does not overlap the data lines is removed.

Abstract translation: 根据实施例的显示装置包括多个驱动块，包括多个栅极线和与栅极线间隔开等于修整区域的量的栅极短路结构; 从一个驱动块延伸到相邻驱动块的等电位线，其一部分被移除等于修整区域的量; 从至少一个驱动块延伸的门虚拟线; 与栅极线相交的多条数据线; 以及设置在栅极虚拟线和数据线之间的有源层，其中有源层的与栅极虚拟线重叠但不与数据线重叠的部分被去除。

公开(公告)号：US11315459B2

公开(公告)日：2022-04-26

申请号：US16039544

申请日：2018-07-19

Applicant: LG Display Co., Ltd.

Inventor： ChungSik Kong ,  HongGyu Han ,  MiHee Shin ,  SeWan Lee

IPC: G11C19/00 ,  G09G3/20 ,  G09G3/36 ,  G09G3/3266

Abstract: A display panel includes pixels connected to gate lines, and a gate driver that supplies a gate signal to at least one of the gate lines and includes a plurality of stages. Each stage includes a pull-up transistor to apply a turn-on voltage of a first clock signal to an output terminal responsive to a voltage at a Q-node, a pull-down transistor to apply a turn-off voltage to the output terminal responsive to a voltage at a QB-node that holds the turn-on voltage during a period in which the output terminal is applied the turn-off voltage, and a QB-node control unit to apply the turn-on voltage to the QB-node responsive to the first clock signal and a second clock signal in reverse-phase with the first clock signal. Accordingly, a display panel may include a gate driver that can set, reset, and hold the voltage at a QB-node.

公开(公告)号：US20190096306A1

公开(公告)日：2019-03-28

申请号：US16039544

申请日：2018-07-19

Applicant: LG Display Co., Ltd.

Inventor： ChungSik Kong ,  HongGyu Han ,  MiHee Shin ,  SeWan LEE

IPC: G09G3/20

Abstract: A display panel includes pixels connected to gate lines, and a gate driver that supplies a gate signal to at least one of the gate lines and includes a plurality of stages. Each stage includes a pull-up transistor to apply a turn-on voltage of a first clock signal to an output terminal responsive to a voltage at a Q-node, a pull-down transistor to apply a turn-off voltage to the output terminal responsive to a voltage at a QB-node that holds the turn-on voltage during a period in which the output terminal is applied the turn-off voltage, and a QB-node control unit to apply the turn-on voltage to the QB-node responsive to the first clock signal and a second clock signal in reverse-phase with the first clock signal. Accordingly, a display panel may include a gate driver that can set, reset, and hold the voltage at a QB-node.