Gate driver with reduced number of thin film transistors and display device including the same

    公开(公告)号:US10276121B2

    公开(公告)日:2019-04-30

    申请号:US15378928

    申请日:2016-12-14

    Abstract: In a gate driver, a Q node is shared by two channels to output a scan signal at high level, and a QB node is shared by four channels to output a scan signal at low level. Accordingly, the number of thin-film transistors required to configure four channels of a gate-in-panel (GIP) is reduced, such that the bezel size can be reduced. Further, the gate driver includes a compensation capacitor or a discharge transistor disposed in some of the channels sharing the Q node, such that deviation in output characteristics among the channels sharing the Q node can be reduced.

    Gate driver circuit and display device including the same

    公开(公告)号:US11482179B2

    公开(公告)日:2022-10-25

    申请号:US17557122

    申请日:2021-12-21

    Abstract: A gate driver circuit includes a plurality of stage circuits, each stage circuit supplies a gate signal to each of gate lines arranged in a display panel and includes a M node, a Q node, a QH node, and a QB node, and each stage circuit includes a line selector, a Q node controller, a Q node and QH node stabilizer, an inverter, a QB node stabilizer, a carry signal output module, and a gate signal output module, and a high voltage level period of a carry clock signal is set not to overlap with a high voltage level period of a first scan clock signal.

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