MIXED-VOLTAGE I/O BUFFER TO LIMIT HOT-CARRIER DEGRADATION
    3.
    发明申请
    MIXED-VOLTAGE I/O BUFFER TO LIMIT HOT-CARRIER DEGRADATION 审中-公开
    混合电压I / O缓冲器限制热载流子降解

    公开(公告)号:US20090002028A1

    公开(公告)日:2009-01-01

    申请号:US11769716

    申请日:2007-06-28

    IPC分类号: H03K19/0175

    CPC分类号: H03K19/00315

    摘要: A Mixed-voltage input and output (I/O) buffer including a pre-driver unit, a bulk-voltage generating unit, a first to a third transistors and an input stage unit is provided. The pre-driver unit outputs a first source/drain and a second signal. The bulk-voltage generating unit determines whether a first voltage or a pad voltage is used as a bulk voltage according to the pad voltage level. A gate of the first transistor receives the first signal, and a bulk, a first source/drain and a second source/drain of the first transistor are respectively coupled to the bulk voltage, the first voltage and the pad. A gate of the third transistor receives the second signal, and a first source/drain and a second source/drain of the third transistor are respectively coupled to the input stage unit for receiving an input signal from the pad and a second voltage.

    摘要翻译: 提供了包括预驱动器单元,体电压产生单元,第一至第三晶体管和输入级单元的混合电压输入和输出(I / O)缓冲器。 预驱动器单元输出第一源极/漏极和第二信号。 体积电压产生单元根据焊盘电压电平来确定是否使用第一电压或焊盘电压作为体电压。 第一晶体管的栅极接收第一信号,并且第一晶体管的体,第一源极/漏极和第二源极/漏极分别耦合到体电压,第一电压和焊盘。 第三晶体管的栅极接收第二信号,第三晶体管的第一源极/漏极和第二源极/漏极分别耦合到输入级单元,用于从焊盘接收输入信号和第二电压。