Indicating acknowledge of stable state of pipeline resource when freeze bit set and context switch inhibited
    1.
    发明授权
    Indicating acknowledge of stable state of pipeline resource when freeze bit set and context switch inhibited 有权
    指示当冻结位设置和上下文切换禁止时管道资源稳定状态的确认

    公开(公告)号:US07467289B1

    公开(公告)日:2008-12-16

    申请号:US11553913

    申请日:2006-10-27

    IPC分类号: G06F11/30

    CPC分类号: G06F9/485

    摘要: Software can freeze portions of a pipeline operation in a processor by asserting a predetermined freeze register in the processor. The processor halts operations relating to portions of a common pipeline processing in response to an asserted freeze register. Processor resources that operate downstream from the common pipeline continue to process any scheduled instructions. The processor is prevented from initiating any context switching in which a processor resource is allocated to a different channel. The processor stops supplying any additional data to downstream resources and ensures that the interface to downstream resources is clear of previously sent data. The processor prevents state machines from making additional requests. The processor asserts an acknowledgement indication in response to the freeze assertion when the processing has reached a stable state. Software is allowed to manipulate states and registers within the processor. Clearing the freeze register allows processing to resume.

    摘要翻译: 软件可以通过在处理器中断言预定的冻结寄存器来冻结处理器中流水线操作的部分。 响应于断言的冻结寄存器,处理器停止与公共流水线处理的部分有关的操作。 在公共管道下游运行的处理器资源继续处理任何计划的指令。 防止处理器发起其中将处理器资源分配给不同信道的任何上下文切换。 处理器停止向下游资源提供任何附加数据,并确保与下游资源的接口清除以前发送的数据。 处理器可防止状态机发出其他请求。 当处理已经达到稳定状态时,处理器响应于冻结断言声明确认指示。 允许软件在处理器内操纵状态和寄存器。 清除冻结寄存器允许处理恢复。