公开(公告)号：US20150362936A1

公开(公告)日：2015-12-17

申请号：US14706555

申请日：2015-05-07

Applicant: Linear Technology Corporation

Inventor： Amitkumar P. Patel ,  Carl Nelson

IPC: G05F1/575

CPC classification number: G05F1/575 ,  G05F1/563 ,  G05F1/59 ,  H02M2001/007

Abstract: In an LDO regulator, two feedback loops are created. The first feedback loop includes a high power PNP bipolar power transistor connected in series between the input voltage Vin terminal and the output voltage Vout terminal. The first feedback loop includes a first error amplifier that controls a drive transistor to drive the base of the power transistor such that Vout matches a set voltage Vset. This first feedback loop circuitry uses an operating voltage (the upper rail voltage) that is regulated by a second feedback loop and is approximately 300 mV greater than Vout. As a result, the control circuitry will be powered by a low ripple supply to improve output PSRR. Further, the power transistor is connected such that any noise in the input voltage is a common mode voltage across the base-emitter of the transistor.

Abstract translation: 在LDO调节器中，创建了两个反馈回路。 第一反馈回路包括串联连接在输入电压Vin端和输出电压Vout端之间的高功率PNP双极功率晶体管。 第一反馈回路包括第一误差放大器，其控制驱动晶体管驱动功率晶体管的基极，使得Vout匹配设定电压Vset。 该第一反馈回路电路使用由第二反馈回路调节的工作电压（上轨电压），并且比Vout大大约300mV。 因此，控制电路将由低纹波电源供电，以改善输出PSRR。 此外，功率晶体管被连接成使得输入电压中的任何噪声都是晶体管的基极 - 发射极两端的共模电压。

公开(公告)号：US09454168B2

公开(公告)日：2016-09-27

申请号：US14706555

申请日：2015-05-07

Applicant: Linear Technology Corporation

Inventor： Amitkumar P. Patel ,  Carl Nelson

IPC: G05F1/575 ,  G05F1/563 ,  G05F1/59 ,  H02M1/00

CPC classification number: G05F1/575 ,  G05F1/563 ,  G05F1/59 ,  H02M2001/007

Abstract: In an LDO regulator, two feedback loops are created. The first feedback loop includes a high power PNP bipolar power transistor connected in series between the input voltage Vin terminal and the output voltage Vout terminal. The first feedback loop includes a first error amplifier that controls a drive transistor to drive the base of the power transistor such that Vout matches a set voltage Vset. This first feedback loop circuitry uses an operating voltage (the upper rail voltage) that is regulated by a second feedback loop and is approximately 300 mV greater than Vout. As a result, the control circuitry will be powered by a low ripple supply to improve output PSRR. Further, the power transistor is connected such that any noise in the input voltage is a common mode voltage across the base-emitter of the transistor.

Abstract translation: 在LDO调节器中，创建了两个反馈回路。 第一反馈回路包括串联连接在输入电压Vin端和输出电压Vout端之间的高功率PNP双极功率晶体管。 第一反馈回路包括第一误差放大器，其控制驱动晶体管驱动功率晶体管的基极，使得Vout匹配设定电压Vset。 该第一反馈回路电路使用由第二反馈回路调节的工作电压（上轨电压），并且比Vout大大约300mV。 因此，控制电路将由低纹波电源供电，以改善输出PSRR。 此外，功率晶体管被连接成使得输入电压中的任何噪声都是晶体管的基极 - 发射极两端的共模电压。