公开(公告)号：US20250104773A1

公开(公告)日：2025-03-27

申请号：US18474619

申请日：2023-09-26

Applicant: MACRONIX International Co., Ltd.

Inventor： Chen Wang ,  Ya-Jui Lee

IPC: G11C16/14 ,  G11C16/04 ,  G11C16/08

Abstract: A memory device and an operating method for the memory device are provided. The memory device includes a memory array and a control circuit. The memory array includes memory blocks. Each of the memory blocks is, for example a three-dimensional NAND flash memory block. The memory device provides a storage media with high-performance and high-capacity. The control circuit provides a first erasing voltage to perform a first erasing operation on target memory cell strings of a selected memory block in the memory blocks, performs a programming operation on the target memory cell strings after the first erasing operation, and provides a second erasing voltage to perform a second erasing operation on at least one part of memory cells of each of the target memory cell strings after the programming operation. The second erasing voltage is lower than the first erasing voltage.