公开(公告)号：US09385240B1

公开(公告)日：2016-07-05

申请号：US14637082

申请日：2015-03-03

Applicant: MACRONIX International Co., Ltd.

Inventor： Chih-Chieh Cheng ,  Shih-Guei Yan ,  Wen-Jer Tsai ,  Nan-Heng Lu

IPC: H01L21/8239 ,  H01L27/105 ,  H01L29/792 ,  H01L27/115 ,  H01L21/266 ,  H01L23/528

CPC classification number: H01L29/7926 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/28282 ,  H01L23/528 ,  H01L27/11568 ,  H01L27/1157 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A memory device includes a substrate, a first doped region, composite structures, word lines, and a charge storage layer. The first doped region is disposed on a surface of the substrate. The composite structures are disposed on the first doped region. Each composite structure includes two semiconductor fin structures and a dielectric layer. Each semiconductor fin structure includes a second doped region disposed at an upper portion of the semiconductor fin structure and a body region disposed between the second doped region and the first doped region. The dielectric layer is disposed between the semiconductor fin structures. The word lines are disposed on the substrate. Each word line covers a partial sidewall and a partial top of each composite structure. The charge storage layer is disposed between the composite structures and the word lines.

Abstract translation: 存储器件包括衬底，第一掺杂区，复合结构，字线和电荷存储层。 第一掺杂区域设置在衬底的表面上。 复合结构设置在第一掺杂区域上。 每个复合结构包括两个半导体鳍结构和介电层。 每个半导体鳍结构包括设置在半导体鳍结构的上部的第二掺杂区和设置在第二掺杂区和第一掺杂区之间的体区。 电介质层设置在半导体鳍片结构之间。 字线设置在基板上。 每个字线覆盖每个复合结构的部分侧壁和部分顶部。 电荷存储层设置在复合结构和字线之间。