公开(公告)号：US12216580B1

公开(公告)日：2025-02-04

申请号：US18456536

申请日：2023-08-28

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Yaniv Strassberg ,  Guy Harel ,  Gabi Liron ,  Yuval Itkin

IPC: G06F12/08 ,  G06F12/0815 ,  G06F12/084 ,  G06F12/14

Abstract: A peripheral device includes a processor, a memory interface, a host interface and a cache controller. The processor executes software code. The cache memory caches a portion of the software code. The memory interface communicates with a NVM storing a replica of the software code. The host interface communicates with hosts storing additional replicas of the software code. The cache controller is to determine whether each host is allocated for code fetching, to receive a request from the processor for a segment of the software code, when available in the cache memory to fetch the segment from the cache memory, when unavailable in the cache memory and at least one host is allocated, to fetch the segment from the hosts that are allocated, when unavailable in the cache memory and no host is allocated, to fetch the segment from the NVM, and to serve the fetched segment to the processor.

公开(公告)号：US20220075737A1

公开(公告)日：2022-03-10

申请号：US17013693

申请日：2020-09-07

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Yuval Itkin ,  Yaniv Strassberg ,  Guy Harel ,  Ahmad Atamlh

IPC: G06F12/14 ,  G06F12/02 ,  G06F12/0891 ,  G06F21/79

Abstract: A computing device includes a non-volatile memory (NVM) interface and a processor. The NVM interface is configured to communicate with an NVM. The processor is configured to store in the NVM Type-Length-Value (TLV) records, each TLV record including one or more encrypted fields and one or more non-encrypted fields, the non-encrypted fields including at least respective validity indicators of the TLV records, to read the TLV records that include the encrypted fields and the non-encrypted fields from the NVM, and to invalidate selected TLV records by modifying the respective validity indicators of the selected TLV records that are stored in the non-encrypted fields.

公开(公告)号：US20250077429A1

公开(公告)日：2025-03-06

申请号：US18950269

申请日：2024-11-18

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Yaniv Strassberg ,  Guy Harel ,  Gabi Liron ,  Yuval Itkin

IPC: G06F12/0815 ,  G06F12/084 ,  G06F12/14

Abstract: A peripheral device includes a processor, a memory interface, a host interface and a cache controller. The processor executes software code. The cache memory caches a portion of the software code. The memory interface communicates with a NVM storing a replica of the software code. The host interface communicates with hosts storing additional replicas of the software code. The cache controller is to determine whether each host is allocated for code fetching, to receive a request from the processor for a segment of the software code, when available in the cache memory to fetch the segment from the cache memory, when unavailable in the cache memory and at least one host is allocated, to fetch the segment from the hosts that are allocated, when unavailable in the cache memory and no host is allocated, to fetch the segment from the NVM, and to serve the fetched segment to the processor.

公开(公告)号：US11681635B2

公开(公告)日：2023-06-20

申请号：US17013693

申请日：2020-09-07

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Yuval Itkin ,  Yaniv Strassberg ,  Guy Harel ,  Ahmad Atamlh

IPC: G06F12/14 ,  G06F21/79 ,  G06F12/02 ,  G06F12/0891

CPC classification number: G06F12/1408 ,  G06F12/0246 ,  G06F12/0891 ,  G06F21/79

Abstract: A computing device includes a non-volatile memory (NVM) interface and a processor. The NVM interface is configured to communicate with an NVM. The processor is configured to store in the NVM Type-Length-Value (TLV) records, each TLV record including one or more encrypted fields and one or more non-encrypted fields, the non-encrypted fields including at least respective validity indicators of the TLV records, to read the TLV records that include the encrypted fields and the non-encrypted fields from the NVM, and to invalidate selected TLV records by modifying the respective validity indicators of the selected TLV records that are stored in the non-encrypted fields.

公开(公告)号：US20220382868A1

公开(公告)日：2022-12-01

申请号：US17336123

申请日：2021-06-01

Applicant: Mellanox Technologies Ltd.

Inventor： Yuval Itkin ,  Guy Harel ,  Mor Sfadia

IPC: G06F21/57 ,  G06F8/658 ,  G06F8/61 ,  G06F8/65

Abstract: Apparatuses, systems, and techniques that implement a unidirectional counter with one-time-programmable memory that prevents the counter from reversing direction. In at least one embodiment, a unidirectional counter is implemented with a base value represented as a binary number and an offset represented as a bit field where each bit represents an equal amount.