SYSTEMS AND METHODS FOR MEMORY CELL ARRAY INITIALIZATION

    公开(公告)号:US20180358084A1

    公开(公告)日:2018-12-13

    申请号:US16105889

    申请日:2018-08-20

    Abstract: Systems and methods are provided for implementing an array rest mode. An example system includes at least one mode register configured to enable an array reset mode, a memory cell array including one or more sense amplifiers, and control logic. Each of the one or more sense amplifier may include at least a first terminal coupled to a first bit line and a second terminal coupled to a second bit line. The control logic may be coupled to the memory cell array, and in communication with the at least one mode register. The control logic may be configured to drive, in response to array reset mode being enabled, each of the first and second terminals of the sense amplifier to a bit-line precharge voltage that corresponds to a bit value to be written to respective memory cells associated with each of the first and second bit lines.

    APPARATUSES AND METHODS FOR TARGETED REFRESHING OF MEMORY
    2.
    发明申请
    APPARATUSES AND METHODS FOR TARGETED REFRESHING OF MEMORY 有权
    存储器的定制刷新的装置和方法

    公开(公告)号:US20160027531A1

    公开(公告)日:2016-01-28

    申请号:US14878354

    申请日:2015-10-08

    Abstract: Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines whether a target row of memory associated with the target row address is a primary or a redundant row of memory. The predecoder is further configured to cause one or more rows of memory physically adjacent the primary row of memory to be refreshed if the primary row is the target row or one or more rows of memory physically adjacent the redundant row of memory to be refreshed if the redundant row of memory is the target row of memory.

    Abstract translation: 本文公开了用于目标行刷新的装置和方法。 在示例性装置中,预解码器接收目标行地址并且确定与目标行地址相关联的目标行存储器是主存储器还是冗余存储器行。 如果主行是目标行或物理上邻近待刷新的存储器的行,存储器的一行或多行存储器将被刷新,则预解码器还被配置为使物理上邻近主行存储器的一行或多行存储器被刷新,如果 内存冗余行是目标行内存。

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