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公开(公告)号:US20230096291A1
公开(公告)日:2023-03-30
申请号:US17449297
申请日:2021-09-29
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Jack Riley , Scott Smith , Christian Mohr , Gary Howe , Joshua Alzheimer , Yoshinori Fujiwara , Sujeet Ayyapureddi , Randall Rooney
Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for bad row mode. The memory may prevent proper access operations (e.g., read operations) from being performed on a selected bad row of the memory as part of a bad row mode. For example, the memory may store a bad row address and when an access address matches the bad row address, may suppress one or more signals, change data read from the address, or combinations thereof. The bad row mode may be used to provide a positive control for post package repair (PPR) operations on the memory. A controller may enter the memory into bad row mode and then test the memory to determine if the selected bad row can be located and repaired via PPR.
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公开(公告)号:US11915775B2
公开(公告)日:2024-02-27
申请号:US17449297
申请日:2021-09-29
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Jack Riley , Scott Smith , Christian Mohr , Gary Howe , Joshua Alzheimer , Yoshinori Fujiwara , Sujeet Ayyapureddi , Randall Rooney
CPC classification number: G11C29/4401 , G11C29/18 , G11C29/46 , G11C29/76 , G11C29/787 , G11C2029/1202
Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for bad row mode. The memory may prevent proper access operations (e.g., read operations) from being performed on a selected bad row of the memory as part of a bad row mode. For example, the memory may store a bad row address and when an access address matches the bad row address, may suppress one or more signals, change data read from the address, or combinations thereof. The bad row mode may be used to provide a positive control for post package repair (PPR) operations on the memory. A controller may enter the memory into bad row mode and then test the memory to determine if the selected bad row can be located and repaired via PPR.
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