公开(公告)号：US20230012978A1

公开(公告)日：2023-01-19

申请号：US17946328

申请日：2022-09-16

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Qisong LIN ,  Vamsi Pavan RAYAPROLU ,  Jiangang WU ,  Sampath K. RATNAM ,  Sivagnanam PARTHASARATHY ,  Shao Chun SHI

IPC: G06F11/07

Abstract: A system includes a memory component to, upon completion of second pass programming in response to a multi-pass programming command, write a plurality of flag bits within a group of memory cells programmed by the multi-pass programming command. The system also includes a processing device, operatively coupled to the memory component. The processing device is to detect an error in attempting to read a top page of the group of memory cells, determine a number of first values within the plurality of flag bits, and in response to the number of first values not satisfying a threshold criterion, report, to a host computing device, an uncorrectable data error due to the top page of the group of memory cells being incompletely programmed.