-
公开(公告)号：US10095617B2
公开(公告)日：2018-10-09
申请号：US14860744
申请日：2015-09-22
Applicant: Macronix International Co., Ltd.
Inventor： Kuen-Long Chang , Su-Chuch Lo , Chao Hsin Lin , Ken-Hui Chen
IPC: G06F12/06
Abstract: A memory device includes an input/output interface configured to receive and output signals. The input/output interface is configured to receive a memory address to be accessed and data sequence information within a clock cycle or at a rising or falling edge of a clock cycle. The data sequence information specifies an input or output data sequence.
Search Results
1
records
(took 0.031 seconds)
筛选
AND
AND
过滤
NOT
NOT
Scan to Join
