公开(公告)号：US20210335627A1

公开(公告)日：2021-10-28

申请号：US17111973

申请日：2020-12-04

Applicant: Microchip Technology Incorporated

Inventor： Justin Sato ,  Yaojian Leng ,  Bomy Chen ,  Chris Sundahl

IPC: H01L21/48 ,  H01L23/498 ,  H01L21/56

Abstract: Methods are provided for forming an integrated circuit (IC) package interposer configured for back-side attachment. A porous silicon double layer is formed on a bulk silicon wafer, e.g., using a controlled anodization, the porous silicon double layer including two porous silicon layers having different porosities. An interposer is formed over the porous silicon double layer, the interposer including back-side contacts, front-side contacts, and conductive structures (e.g., vias and metal interconnect) extending through the interposer to connect selected back-side contacts with selected front-side contacts. The structure is then split at the interface between the first and second porous silicon layers of the silicon double layer, and the interposer including the second porous silicon layers is inverted and etched to remove the second silicon layer and expose the back-side contacts, such that the exposed back-side contacts can be used for back-side attachment of the interposer to a package substrate or other structure.

公开(公告)号：US20230050344A1

公开(公告)日：2023-02-16

申请号：US17888057

申请日：2022-08-15

Applicant: Microchip Technology Incorporated

Inventor： Daniel Baker ,  Justin Sato ,  Chris Sundahl

IPC: H01L21/311 ,  H01L21/768 ,  H01L21/027 ,  H01L23/522

Abstract: A method of forming a via is provided. A lower metal element is formed, and a first patterned photoresist is used to form a sacrificial element over the lower metal element. A dielectric region including a dielectric element projection extending upwardly above the sacrificial element is formed. A second patterned photoresist including a second photoresist opening is formed, wherein the dielectric element projection is at least partially located in the second photoresist opening. A dielectric region trench opening is etched in the dielectric region. The sacrificial element is removed to define a via opening extending downwardly from the dielectric region trench opening. The dielectric region trench opening and the via opening are filled to define (a) an upper metal element in the dielectric region trench opening and (b) a via in the via opening, wherein the via extends downwardly from the upper metal element.