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公开(公告)号:US11995337B2
公开(公告)日:2024-05-28
申请号:US17283210
申请日:2021-02-18
Applicant: Micron Technology, Inc.
Inventor: Huachen Li , Zhou Zhou , Chaofeng Zhang , Jianfeng Li , Chen Huang , Lin Huang , Wei Li
IPC: G06F3/06
CPC classification number: G06F3/0652 , G06F3/0604 , G06F3/0659 , G06F3/0679
Abstract: Methods, systems, and devices for improved implicit ordered command handling are described. For instance, a memory device may receive, from a host device, a first command and a second command. The memory device may determine whether a first memory operation associated with the first command and a second memory operation associated with the second command are to be performed in an order relative to each other based on a first time when the first command is received relative to a second time when the second command is received. The memory device may select whether to perform a first memory access procedure or a second memory access procedure based on whether the first memory operation and the second memory operation are a same type of memory operation and on whether the first memory operation and the second memory operation are to be performed in the order relative to each other.
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公开(公告)号:US20240345759A1
公开(公告)日:2024-10-17
申请号:US18646025
申请日:2024-04-25
Applicant: Micron Technology, Inc.
Inventor: Huachen Li , Zhou Zhou , Chaofeng Zhang , Jianfeng Li , Chen Huang , Lin Huang , Wei Li
IPC: G06F3/06
CPC classification number: G06F3/0652 , G06F3/0604 , G06F3/0659 , G06F3/0679
Abstract: Methods, systems, and devices for improved implicit ordered command handling are described. For instance, a memory device may receive, from a host device, a first command and a second command. The memory device may determine whether a first memory operation associated with the first command and a second memory operation associated with the second command are to be performed in an order relative to each other based on a first time when the first command is received relative to a second time when the second command is received. The memory device may select whether to perform a first memory access procedure or a second memory access procedure based on whether the first memory operation and the second memory operation are a same type of memory operation and on whether the first memory operation and the second memory operation are to be performed in the order relative to each other.
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