公开(公告)号：US20240184596A1

公开(公告)日：2024-06-06

申请号：US17904081

申请日：2022-03-17

Applicant: Micron Technology, Inc.

Inventor： Jiawei Wang ,  Zephyr Yu ,  Yaming Lu ,  Long Lu ,  Huachen Li ,  Wenjun Wu ,  Chen Huang

IPC: G06F9/30

CPC classification number: G06F9/30178

Abstract: Methods, systems, and devices for compressing firmware data are described. A memory system may access firmware data associated with the memory system that includes bank data. The memory system may determine whether the bank data in the firmware data is compressed and, in cases that the bank data is compressed, the memory system may decompress the bank data prior to storing the bank data at a controller of the memory system. In some examples, a bank header in the firmware data may include information for the memory system to decompress the bank data. For example, the bank header may indicate the size of the compressed bank data associated with each bank. Additionally, the memory system may read the compressed bank data according to the indicated size and store the bank data at the controller or at a memory device of the memory system.

公开(公告)号：US11720278B2

公开(公告)日：2023-08-08

申请号：US17869262

申请日：2022-07-20

Applicant: Micron Technology, Inc.

Inventor： Huachen Li ,  Xu Zhang ,  Zhong Xian Li ,  Xinghui Duan ,  Xing Wang ,  Tian Liang

IPC: G06F3/06 ,  G06F12/02 ,  G06F12/0882

CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/0652 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0246 ,  G06F12/0882 ,  G06F2212/7201 ,  G06F2212/7205 ,  G06F2212/7209

Abstract: Devices and techniques for data removal marking in a memory device are described herein. A delete command can be received at the memory device. A count of data portions in the delete command can be compared to determine whether the count is below a threshold. In response to determining that the count of data portions is below the threshold, the data portions can be written to a buffer. When a buffer full event is detected, a segment of an L2P data structure can be loaded into working memory of the memory device. Then, each record in the segment of the L2P data structure that has a corresponding entry in the buffer can be updated to mark the data as removable (e.g., invalid).

公开(公告)号：US20240345759A1

公开(公告)日：2024-10-17

申请号：US18646025

申请日：2024-04-25

Applicant: Micron Technology, Inc.

Inventor： Huachen Li ,  Zhou Zhou ,  Chaofeng Zhang ,  Jianfeng Li ,  Chen Huang ,  Lin Huang ,  Wei Li

IPC: G06F3/06

CPC classification number: G06F3/0652 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0679

Abstract: Methods, systems, and devices for improved implicit ordered command handling are described. For instance, a memory device may receive, from a host device, a first command and a second command. The memory device may determine whether a first memory operation associated with the first command and a second memory operation associated with the second command are to be performed in an order relative to each other based on a first time when the first command is received relative to a second time when the second command is received. The memory device may select whether to perform a first memory access procedure or a second memory access procedure based on whether the first memory operation and the second memory operation are a same type of memory operation and on whether the first memory operation and the second memory operation are to be performed in the order relative to each other.

公开(公告)号：US12039194B2

公开(公告)日：2024-07-16

申请号：US17050334

申请日：2020-08-25

Applicant: Micron Technology, Inc.

Inventor： Huachen Li ,  Xu Zhang ,  Xing Wang ,  Guan Zhong Wang ,  Tian Liang ,  Junjun Wang

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0607 ,  G06F3/0658 ,  G06F3/0688

Abstract: Methods, systems, and devices for unmap backlog in a memory system are described. A memory system may be configured to support receiving an unmap command from a host system and signaling, to the host system, an indication that the unmap command has been processed (e.g., handled, acknowledged). In response to the unmap command, the memory system may proceed with various unmap operations, which may include unmapping at least some of the associated addresses after indicating that the unmap command has been processed. For example, a memory system may implement an unmap backlog table to identify sections of addresses that are to be unmapped (e.g., after indicating that the unmap command has been processed). In some examples, the memory system may support various aspects of prioritization between unmap operations (e.g., background unmap operations) and other access operations such as read operations, write operations, or other access operations.

公开(公告)号：US20220357877A1

公开(公告)日：2022-11-10

申请号：US17869262

申请日：2022-07-20

Applicant: Micron Technology, Inc.

Inventor： Huachen Li ,  Xu Zhang ,  Zhong Xian Li ,  Xinghui Duan ,  Xing Wang ,  Tian Liang

IPC: G06F3/06 ,  G06F12/02 ,  G06F12/0882

Abstract: Devices and techniques for data removal marking in a memory device are described herein. A delete command can be received at the memory device. A count of data portions in the delete command can be compared to determine whether the count is below a threshold. In response to determining that the count of data portions is below the threshold, the data portions can be written to a buffer. When a buffer full event is detected, a segment of an L2P data structure can be loaded into working memory of the memory device. Then, each record in the segment of the L2P data structure that has a corresponding entry in the buffer can be updated to mark the data as removable (e.g., invalid).

公开(公告)号：US20240201860A1

公开(公告)日：2024-06-20

申请号：US18511814

申请日：2023-11-16

Applicant: Micron Technology, Inc.

Inventor： Wenjun Wu ,  Huachen Li ,  Xiaolai Zhu ,  Ling Shi ,  Qingyuan Wang

IPC: G06F3/06 ,  G06F12/1009

CPC classification number: G06F3/0613 ,  G06F3/0656 ,  G06F3/0679 ,  G06F12/1009

Abstract: Methods, systems, and devices for address mappings for random access operations are described. A portion of a L2P table may be loaded (e.g., to a buffer) upon receiving a write command (e.g., a random write command). In some instances, one or more entries (e.g., one or more mappings) included in the portion of the L2P table may be updated based on the write command. The portion of the L2P table may be maintained in the buffer during subsequent access operations, such as random read operations. The subsequent access operations may utilize the portion of the L2P table to access a memory device.

公开(公告)号：US20230342077A1

公开(公告)日：2023-10-26

申请号：US17050334

申请日：2020-08-25

Applicant: Micron Technology, Inc.

Inventor： Huachen Li ,  Xu Zhang ,  Xing Wang ,  Guan Zhong Wang ,  Tian Liang ,  Junjun Wang

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0607 ,  G06F3/0658 ,  G06F3/0688

Abstract: Methods, systems, and devices for unmap backlog in a memory system are described. A memory system may be configured to support receiving an unmap command from a host system and signaling, to the host system, an indication that the unmap command has been processed (e.g., handled, acknowledged). In response to the unmap command, the memory system may proceed with various unmap operations, which may include unmapping at least some of the associated addresses after indicating that the unmap command has been processed. For example, a memory system may implement an unmap backlog table to identify sections of addresses that are to be unmapped (e.g., after indicating that the unmap command has been processed). In some examples, the memory system may support various aspects of prioritization between unmap operations (e.g., background unmap operations) and other access operations such as read operations, write operations, or other access operations.

公开(公告)号：US11733892B2

公开(公告)日：2023-08-22

申请号：US17362542

申请日：2021-06-29

Applicant: Micron Technology, Inc.

Inventor： Xiangang Luo ,  Ashutosh Malshe ,  Huachen Li ,  Giuseppe D'eliseo ,  Jianmin Huang

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0679

Abstract: An apparatus can include a partial superblock memory management component. The partial superblock memory management component can identify bad blocks in respective planes of a block of non-volatile memory cells. The partial superblock memory management component can determine that a plane of the respective planes includes at least good block in at least one different block of non-volatile memory cells. The partial superblock memory management component can perform an operation to reallocate the at least one good block in the plane to the at least one bad block in the plane to form blocks of non-volatile memory cells having a quantity of bad blocks that satisfies a bad block threshold.

公开(公告)号：US20240411483A1

公开(公告)日：2024-12-12

申请号：US18749469

申请日：2024-06-20

Applicant: Micron Technology, Inc.

Inventor： Huachen Li ,  Xu Zhang ,  Xing Wang ,  Guan Zhong Wang ,  Tian Liang ,  Junjun Wang

IPC: G06F3/06

Abstract: Methods, systems, and devices for unmap backlog in a memory system are described. A memory system may be configured to support receiving an unmap command from a host system and signaling, to the host system, an indication that the unmap command has been processed (e.g., handled, acknowledged). In response to the unmap command, the memory system may proceed with various unmap operations, which may include unmapping at least some of the associated addresses after indicating that the unmap command has been processed. For example, a memory system may implement an unmap backlog table to identify sections of addresses that are to be unmapped (e.g., after indicating that the unmap command has been processed). In some examples, the memory system may support various aspects of prioritization between unmap operations (e.g., background unmap operations) and other access operations such as read operations, write operations, or other access operations.

公开(公告)号：US20240192888A1

公开(公告)日：2024-06-13

申请号：US17758332

申请日：2022-03-17

Applicant: Micron Technology, Inc.

Inventor： Na Zhu ,  Ling Shi ,  Bo Sun ,  Huachen Li ,  Qingyuan Wang

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0611 ,  G06F3/0656 ,  G06F3/0683

Abstract: Methods, systems, and devices for low-latency processing for unmap commands are described. A plurality of commands including one or more unmap commands and one or more other types of commands may be received from a device. The one or more unmap commands may be stored in a queue used for unmap commands and the other commands may be stored in another queue. Ready-to-transfer messages for the one or more unmap commands stored in the queue may be transmitted to the device. In response to the ready-to-transfer messages, one or more messages including data for executing the one or more unmap commands may be received and stored in a portion of a buffer used for unmap commands.