公开(公告)号：US20230386258A1

公开(公告)日：2023-11-30

申请号：US18233892

申请日：2023-08-15

Applicant: PIXART IMAGING INC.

Inventor： Ren-Chieh LIU ,  Yi-Hsien KO ,  Han-Chi LIU

IPC: G06V40/20 ,  G06V10/94 ,  H04N25/75

CPC classification number: G06V40/20 ,  G06V10/94 ,  H04N25/75

Abstract: There is provided an optical sensor including a pixel matrix and a readout circuit. The pixel matrix includes multiple pixels arranged in a matrix, and each of the multiple pixels outputs temporal difference pixel data. The readout circuit sequentially reads the pixel matrix using a readout block, and performs the hybrid difference calculation on the temporal difference pixel data of pixels within the readout block. Accordingly, the output of the readout circuit is the data accomplishing temporal difference and spatial difference.

公开(公告)号：US20210383143A1

公开(公告)日：2021-12-09

申请号：US17333022

申请日：2021-05-28

Applicant: PIXART IMAGING INC.

Inventor： Ren-Chieh LIU ,  Yi-Hsien KO ,  Han-Chi LIU

IPC: G06K9/00 ,  H04N5/378 ,  G06K9/20

Abstract: There is provided an optical sensor including a pixel matrix and a readout circuit. The pixel matrix includes multiple pixels arranged in a matrix, and each of the multiple pixels outputs temporal difference pixel data The readout circuit sequentially reads the pixel matrix using a readout block, and performs the hybrid difference calculation on the temporal difference pixel data of pixels within the readout block. Accordingly, the output of the readout circuit is the data accomplishing temporal difference and spatial difference.

公开(公告)号：US20220302112A1

公开(公告)日：2022-09-22

申请号：US17206862

申请日：2021-03-19

Applicant: PixArt Imaging Inc.

Inventor： Yung-Ju WEN ,  Han-Chi LIU ,  Hsin-You KO

IPC: H01L27/092

Abstract: There is provided a logic circuit capable of preventing latch-up. The conducting of a parasitic SCR is prevented by doping an additional N+ active region in the N well region of a PMOS transistor and doping an additional P+ active region in the P well region of an NMOS transistor so as to prevent the occurrence of latch-up.

公开(公告)号：US20210404870A1

公开(公告)日：2021-12-30

申请号：US17474738

申请日：2021-09-14

Applicant: PixArt Imaging Inc.

Inventor： Kuan TANG ,  Yi-Cheng CHIU ,  Chia-Chi KUO ,  Jui-Te CHIU ,  Han-Chi LIU

IPC: G01J1/46

Abstract: There is provided a circuit to improve the sensing efficiency of pixels that uses the induction effect of a capacitor to duplicate a voltage deviation caused by additional electrons and uses a circuit to cancel out the voltage deviation during reading pixel data thereby improving the sensing efficiency.

公开(公告)号：US20220070404A1

公开(公告)日：2022-03-03

申请号：US17009417

申请日：2020-09-01

Applicant: PixArt Imaging Inc.

Inventor： Ren-Chieh LIU ,  Chih-Huan WU ,  Yi-Hsien KO ,  Han-Chi LIU

IPC: H04N5/3745 ,  H01L27/146

Abstract: There is provided a pixel circuit for performing analog operation including a photodiode, a first temporal circuit, a second temporal circuit and an operation circuit. Within a first interval, the photodiode detects first light energy to be stored in the first temporal circuit. Within a second interval, the photodiode detects second light energy to be stored in the second temporal circuit. Within an operation interval, the first temporal circuit outputs a first detection signal having a first pulse width according to the first light energy and outputs a second detection signal having a second pulse width according to the second light energy for being calculated by the operation circuit.

公开(公告)号：US20190174084A1

公开(公告)日：2019-06-06

申请号：US15830754

申请日：2017-12-04

Applicant: PixArt Imaging Inc.

Inventor： Chia-Chi KUO ,  Jui-Te CHIU ,  Han-Chi LIU ,  Peng-Sheng CHEN ,  Yi-Cheng CHIU

IPC: H04N5/378 ,  H04N5/369 ,  H04N5/3745

Abstract: An image sensor including a first pixel circuit, a second pixel circuit, a first readout line, a second readout line, a first readout circuit, a second readout circuit and an average switch is provided. The first and second pixel circuits are in two columns of a pixel array. The first readout line transmits pixel data of the first pixel circuit to the first readout circuit. The second readout line transmits pixel data of the second pixel circuit to the second readout circuit. The average switch is arranged between the first and second readout lines and used to electrically connect the first and second readout lines in an average mode to average the pixel data on the first and second readout lines.

公开(公告)号：US20230275089A1

公开(公告)日：2023-08-31

申请号：US18143608

申请日：2023-05-05

Applicant: PixArt Imaging Inc.

Inventor： Yung-Ju WEN ,  Han-Chi LIU ,  Hsin-You KO

IPC: H01L27/092

CPC classification number: H01L27/0921

Abstract: There is provided a logic circuit capable of preventing latch-up. The conducting of a parasitic SCR is prevented by doping an additional N+ active region in the N well region of a PMOS transistor and doping an additional P+ active region in the P well region of an NMOS transistor so as to prevent the occurrence of latch-up.