公开(公告)号：US20190097648A1

公开(公告)日：2019-03-28

申请号：US15993432

申请日：2018-05-30

Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATION

Inventor： Jae Yoon SIM ,  Seungnam CHOI

IPC: H03M3/00

Abstract: The present invention relates to a successive approximation register (SAR)-type analog-digital converter (ADC), which can amplify a residual voltage without a non-linearity problem caused by an output voltage of a residual voltage amplifier, thereby performing high-resolution analog-digital conversion at low power consumption.The SAR-type ADC may include: a coarse/fine SAR conversion unit configured to receive an analog input voltage and convert the received voltage into an MSB digital signal in a coarse SAR conversion mode, and receive a feedback voltage and convert the received voltage into an LSB digital signal in a fine SAR conversion mode; and a residue integration unit configured to repeatedly amplify a residual voltage with a predetermined gain by a predetermined number of times and output the amplified voltage as a final target multiple, the residual voltage corresponding to a voltage difference between the analog input voltage and an analog voltage obtained by converting the digital signal into an analog signal.