Single cycle weighted random early detection circuit and method
    1.
    发明授权
    Single cycle weighted random early detection circuit and method 有权
    单周期加权随机早期检测电路及方法

    公开(公告)号:US07286550B2

    公开(公告)日:2007-10-23

    申请号:US10318769

    申请日:2002-12-13

    Abstract: A system and method is provided for traffic management and regulation in a packet-based communication network, the system and method facilitating proactive, discriminating congestion control on a per flow basis of packets traversing the Internet via use of a Weighted Random Early Detection (WRED) algorithm that monitors the incoming packet queue and optimizes enqueuing or discard of incoming packets to stabilize queue length and promote efficient packet processing. During optimized discard conditions, the system and method discern a relative priority among incoming packets, distribute packets with a relatively high priority and discard packets with a relatively low priority. Additionally, packet traffic are policed and discarded according to packet type, quantity or other predetermined criteria. The present invention performs in periodic mode, demand mode or both, and can be implemented as a hardware solution, a software solution, or a combination thereof.

    Abstract translation: 提供了一种用于基于分组的通信网络中的流量管理和调节的系统和方法,所述系统和方法通过使用加权随机早期检测(WRED)来促进主动地识别跨越因特网的分组的每流的拥塞控制, 该算法监视传入的数据包队列,并优化进入数据包的入队或丢弃,以稳定队列长度并促进高效的数据包处理。 在优化的丢弃条件下,系统和方法识别输入报文的相对优先级,分配具有较高优先级的报文,丢弃具有较低优先级的报文。 此外,根据分组类型,数量或其他预定标准对分组业务进行监管和丢弃。 本发明以周期模式,需求模式或两者都执行,并且可以被实现为硬件解决方案,软件解决方案或其组合。

    Recoverable cut-through buffer and method
    2.
    发明授权
    Recoverable cut-through buffer and method 有权
    可恢复的直通缓冲器和方法

    公开(公告)号:US06687256B2

    公开(公告)日:2004-02-03

    申请号:US10325104

    申请日:2002-12-19

    Abstract: The present invention provides a unique system and method for optimizing packet processing flow in a communications network by minimizing latency associated with packet-forwarding eligibility determinations. The present invention employs a speculative scheme with automatic recovery, including a two-way multithreaded implementation designed to overcome the aforementioned latency issue, including the functionality of enqueuing an incoming packet in both packet memory and a cut through buffer; determining the packet's eligibility for cutting through the buffer; and based on the determination, rolling back the unsuccessful process.

    Abstract translation: 本发明提供了一种独特的系统和方法,用于通过最小化与分组转发资格确定相关联的延迟来优化通信网络中的分组处理流程。 本发明采用具有自动恢复的推测方案,包括旨在克服上述等待时间问题的双向多线程实现,包括在分组存储器和切入缓冲器中对输入分组进行排队的功能; 确定数据包是否有资格切入缓冲区; 并根据决定,回滚不成功的过程。

    STEREO IMAGE MATCHING BY SHAPE PRESERVING FILTERING OF A COST VOLUME IN A PHASE DOMAIN
    3.
    发明申请
    STEREO IMAGE MATCHING BY SHAPE PRESERVING FILTERING OF A COST VOLUME IN A PHASE DOMAIN 有权
    STEREO图像匹配形状保存相位域中成本量的过滤

    公开(公告)号:US20160284090A1

    公开(公告)日:2016-09-29

    申请号:US14671883

    申请日:2015-03-27

    Abstract: Techniques related to stereo image correspondence are discussed. Such techniques may include determining a filtered cost volume for stereo images using phase domain based costs and selecting disparity values for pixel locations based on the filtered cost volume. The filtered cost volume may be generated based on phase matching costs in single or multi-resolution.

    Abstract translation: 讨论与立体图像对应有关的技术。 这样的技术可以包括使用基于相域的成本确定用于立体图像的经过滤的成本体积,并且基于滤波的成本体积来选择像素位置的视差值。 可以基于单分辨率或多分辨率的相位匹配成本来生成经过滤的成本量。

    Method and apparatus for floating point operations and format conversion operations
    6.
    发明授权
    Method and apparatus for floating point operations and format conversion operations 失效
    用于浮点运算和格式转换操作的方法和装置

    公开(公告)号:US06282554B1

    公开(公告)日:2001-08-28

    申请号:US09071466

    申请日:1998-04-30

    CPC classification number: H03M7/24

    Abstract: A floating point arithmetic apparatus for converting numbers between an integer format and a floating point format, wherein a conversion operation requires a greater data path width than a conversion operation. The apparatus comprises right shift circuitry that receives a number in the floating point format, wherein the right shift circuitry includes additional register positions to accommodate a shift beyond a data path width required by an arithmetic operation.

    Abstract translation: 一种用于在整数格式和浮点格式之间转换数字的浮点算术装置,其中转换操作需要比转换操作更大的数据路径宽度。 该装置包括接收浮点格式的数字的右移位电路,其中右移电路包括附加的寄存器位置,以适应超出算术运算所需的数据路径宽度的移位。

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