公开(公告)号：US09690363B2

公开(公告)日：2017-06-27

申请号：US14338342

申请日：2014-07-22

Applicant: QUALCOMM INCORPORATED

Inventor： Hee Jun Park ,  Yiran Li ,  Inho Hwang ,  Young Hoon Kang ,  Joshua Hirsch Stubbs ,  Sean Sweeney ,  Robert Nicholson Gibson ,  Andrew James Frantz ,  Viswanathan Kumaragurubaran ,  Sumant Madhav Paranjpe

IPC: G06F1/32 ,  G06F1/26

CPC classification number: G06F1/3296 ,  G06F1/26 ,  G06F1/324 ,  Y02D10/172

Abstract: A method and system for optimizing a core voltage level of a portable computing device (“PCD”) and enhancing frequency performance of individual subcomponents are disclosed. A plurality of voltage values for a plurality of subsystems is determined. At least one subsystem is a multiplexed subsystem. Next, a reduced set of voltage values is calculated based on the plurality of voltage values and an optimized voltage level is determined for a shared power domain. The shared power domain is subsequently set to the optimized voltage level. If the optimized voltage level is determined to exceed a required voltage level for the at least one multiplexed subsystem when it is running the plurality of processing engines, a subset of the plurality of processing engines may be identified to process a workload of the multiplexed system at a more efficient level of power consumption than the full plurality of processing engines.

公开(公告)号：US09927866B2

公开(公告)日：2018-03-27

申请号：US14187270

申请日：2014-02-22

Applicant: QUALCOMM INCORPORATED

Inventor： Hee Jun Park ,  Yiran Li ,  Inho Hwang ,  Young Hoon Kang ,  Joshua Stubbs ,  Sean Sweeney ,  R. Nicholson Gibson ,  Andrew J. Frantz

IPC: G06F1/32 ,  G06F1/26

CPC classification number: G06F1/3296 ,  G06F1/26 ,  G06F1/324 ,  Y02D10/172

Abstract: A method and system for optimizing a core voltage level of a portable computing device (“PCD”) and enhancing frequency performance of individual subcomponents are disclosed. A plurality of voltage values is determined for a plurality of subcomponents within the PCD. Next, a reduced set of voltage values may be calculated with a voltage aggregator based on the plurality of voltage values. An optimized voltage level for a shared power domain may then be determined by a voltage optimizer within the PCD from the reduced set of voltage values. A shared power domain may then be set to the optimized voltage level. Subsequently, an operating frequency of each subcomponent may be optimized with a frequency performance enhancer based on the optimized voltage level. An optimal power collapse duration may also be calculated by the frequency performance enhancer and set for each subcomponent from the optimal frequency.