公开(公告)号：US10338201B2

公开(公告)日：2019-07-02

申请号：US15263613

申请日：2016-09-13

Applicant: QUALCOMM Incorporated

Inventor： Volodimir Slobodyanyuk ,  Daniel Butterfield

IPC: G01S7/497 ,  G01S17/08 ,  G01S17/02 ,  G01S7/484

Abstract: An example method for use with a LIDAR system includes assigning a firing time of a laser included in the LIDAR system. The assignment of the firing time includes: (i) receiving a universal clock signal at the LIDAR system, where the universal clock signal common to one or more other LIDAR systems; (ii) synchronizing a system clock of the LIDAR system to the universal clock signal to generate a synchronized clock signal; and determining the firing time based on the synchronized clock signal to reduce interference with the one or more other LIDAR systems. The method also includes firing the laser at the firing time.

公开(公告)号：US20190053725A1

公开(公告)日：2019-02-21

申请号：US15677650

申请日：2017-08-15

Applicant: QUALCOMM Incorporated

Inventor： William Henry Von Novak ,  Osvaldo Alcala ,  Stephen Jay Shellhammer ,  Daniel Butterfield

IPC: A61B5/04 ,  A61N1/05 ,  A61B5/00 ,  G06F3/01

Abstract: Techniques described herein provide for the detection and capture of neural signals in a manner that compresses data sent from electrodes to controller by several orders of magnitude over current techniques. In particular, embodiments include detecting a threshold amplitude and/or slope of a detected neural signal, and capturing the detected neural signal once these thresholds are met. A threshold timing detector may be implemented as well. Additionally, these thresholds may be configurable to accommodate various factors, such as electrode placement, sensitivity, etc.

公开(公告)号：US10749481B2

公开(公告)日：2020-08-18

申请号：US15956026

申请日：2018-04-18

Applicant: QUALCOMM Incorporated

Inventor： Bo Sun ,  Yi Tang ,  Daniel Butterfield

IPC: H03F3/68 ,  H03F1/56 ,  H03F1/02 ,  H03F3/21 ,  H03F1/30

Abstract: Aspects generally relate to reducing delay, or phase jitter, in high speed signals transmission. Variations in power supply to ground potential changes the amount of delay introduced by transmit circuitry into the signal being transmitted, resulting in jitter, or phase noise, in the transmitted signal. To reduce phase jitter, or phase noise, aspects disclosed include a variable impedance circuit coupled to the signal distribution network, the impedance level of the variable impedance circuit is adjusted in response to variation in the supply to ground potential, such that the delay introduced by the impedance compensates for changes in the delay due to variations in supply to ground potential, resulting in substantially constant delay.

公开(公告)号：US10250417B1

公开(公告)日：2019-04-02

申请号：US15948896

申请日：2018-04-09

Applicant: QUALCOMM Incorporated

Inventor： Bo Sun ,  Daniel Butterfield

IPC: H04L25/03 ,  H03K5/24

Abstract: One feature pertains to an apparatus that includes a first stage track and hold circuit that subsamples a receive equalizer output of a receive equalizer, and a second stage track and hold circuit that generates a first signal representative of an average voltage value of a logical value at the receive equalizer output when a high frequency bit pattern is detected, and a second signal representative of an average voltage value of the logical value at the receive equalizer output when a steady state bit pattern is detected. The apparatus further includes a comparator circuit that generates a comparator output signal that indicates which of the first signal and the second signal has a greater magnitude, and a processing circuit that generates equalizer tuning signals based on the comparator output signal to adjust parameters of an equalizer that affects the receive equalizer output.