公开(公告)号：US20240250669A1

公开(公告)日：2024-07-25

申请号：US18156975

申请日：2023-01-19

Applicant: QUALCOMM Incorporated

Inventor： Ramaprasath VILANGUDIPITCHAI ,  Rui CHEN ,  Seung Hyuk KANG ,  Venugopal BOYNAPALLI

IPC: H03K3/037

CPC classification number: H03K3/0372 ,  H03K3/012

Abstract: A hybrid flop tray, including: a set of flip-flops cascaded along a scan path, wherein a first subset of one or more of the flip-flops of the set includes fin field effect transistors (FinFETs) each sized with a first number of fins, and a second subset of one or more of the flip-flops of the set includes FinFETs each sized with a second number of fins, wherein the first number of fins is different than the second number of fins; and a control circuit configured to provide control signals to the set of flip-flops.