Code pointer authentication for hardware flow control
    2.
    发明授权
    Code pointer authentication for hardware flow control 有权
    用于硬件流控制的代码指针认证

    公开(公告)号:US09514305B2

    公开(公告)日:2016-12-06

    申请号:US14517572

    申请日:2014-10-17

    CPC classification number: G06F21/56 G06F21/52 G06F21/554

    Abstract: Techniques for enforcing flow control of a software program in a processor are provided. An example method according to these techniques includes analyzing program code of the software program to identify a code pointer in the program code, generating an authentication tag based on the code pointer, and modifying the code pointer in the program code with the authentication tag to generate a tagged code pointer.

    Abstract translation: 提供了用于在处理器中执行软件程序的流控制的技术。 根据这些技术的示例性方法包括分析软件程序的程序代码以识别程序代码中的代码指针,基于代码指针生成认证标签,并用认证标签修改程序代码中的代码指针以产生 一个标记的代码指针。

    Techniques for instruction perturbation for improved device security

    公开(公告)号:US11599625B2

    公开(公告)日:2023-03-07

    申请号:US17160769

    申请日:2021-01-28

    Abstract: Methods, systems, and devices for techniques for instruction perturbation for improved device security are described. A device may assign a set of executable instructions to an instruction packet based on a parameter associated with the instruction packet, and each executable instruction of the set of executable instructions may be independent from other executable instructions of the set of executable instructions. The device may select an order of the set of executable instructions based on a slot instruction rule associated with the device, and each executable instruction of the set of executable instructions may correspond to a respective slot associated with memory of the device. The device may modify the order of the set of executable instructions in a memory hierarchy post pre-decode based on the slot instruction rule and process the set of executable instructions of the instruction packet based on the modified order.

    Increasing address space layout randomization entropy via page remapping and rotations

    公开(公告)号:US11386012B1

    公开(公告)日:2022-07-12

    申请号:US17201247

    申请日:2021-03-15

    Abstract: Various embodiments include methods and devices for generating a memory map configured to map virtual addresses of pages to physical addresses, in which pages of a same size are grouped into regions. The embodiments may include adding a first entry for a first additional page to a first region in the memory map, shifting virtual addresses of the first region to accommodate a shift of virtual addresses of the first region allocated for code by a sub-page granular shift amount, mapping shifted virtual addresses of the first entry for the first additional page to physical address mapped to a first lowest shifted virtually addressed page of the first region, and shifting the virtual addresses of the first region allocated for code by a sub-page granular shift amount, in which the virtual addresses of the first region allocated for code partially shift into the first entry for the first additional page.

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