公开(公告)号：US20180197609A1

公开(公告)日：2018-07-12

申请号：US15915823

申请日：2018-03-08

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ken MATSUBARA ,  Takashi IWASE ,  Satoru NAKANISHI

IPC: G11C16/08 ,  G11C16/04 ,  H03K3/356

CPC classification number: G11C16/08 ,  G11C16/0416 ,  G11C16/0433 ,  H03K3/356104

Abstract: In order to reduce the manufacturing cost, a flash memory includes a memory cell array formed by a plurality of memory cells arranged in a matrix shape; a plurality of word lines provided in each column of the memory cell array; a first word line driver that outputs a first voltage group to each of the word lines; and a second word line driver that outputs a second voltage group to each of the word lines together with the first word line driver.

公开(公告)号：US20170236587A1

公开(公告)日：2017-08-17

申请号：US15432228

申请日：2017-02-14

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ken MATSUBARA ,  Takashi IWASE ,  Satoru NAKANISHI

IPC: G11C16/08 ,  G11C16/04

CPC classification number: G11C16/08 ,  G11C16/0416 ,  G11C16/0433 ,  H03K3/356104

Abstract: In order to reduce the manufacturing cost, a flash memory includes a memory cell array formed by a plurality of memory cells arranged in a matrix shape; a plurality of word lines provided in each column of the memory cell array; a first word line driver that outputs a first voltage group to each of the word lines; and a second word line driver that outputs a second voltage group to each of the word lines together with the first word line driver.