公开(公告)号：US20040241944A1

公开(公告)日：2004-12-02

申请号：US10878247

申请日：2004-06-29

Applicant: Renesas Technology Corp.

Inventor： Kozo Katayama ,  Yoshiaki Kamigaki ,  Shinichi Minami

IPC: G11C011/34

CPC classification number: H01L27/115 ,  G11C16/0475 ,  G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  H01L29/7923

Abstract: Disclosed herein is a nonvolatile memory device having a plurality of nonvolatile memory cells. In the nonvolatile memory cell, a memory gate electrode is formed over a first semiconductor region with a gate insulating film and a gate nitride film interposed therebetween. First and second switch gate electrodes, and first and second signal electrodes used as source/drain electrodes are formed on both sides of the memory gate electrode. Electrons are injected into the gate nitride film from the source side so that each of the memory cells stores information therein. The memory gate electrode and the switch gate electrodes extend in the same direction. Thus, even if a high voltage is applied to the memory gate electrode of each write-intended memory cell which uses the memory gate electrode and switch gate electrodes in common, and write and write blocking voltages are applied through the first and second signal electrodes, each memory cell intended for write non-selection can avoid the application of a high electric field thereto owing to the switch gate electrodes held in a cut-off state.

Abstract translation: 这里公开了具有多个非易失性存储单元的非易失性存储器件。 在非易失性存储单元中，在栅极绝缘膜和介于其间的栅极氮化物膜的第一半导体区域上形成存储栅电极。 第一和第二开关栅电极以及用作源/漏电极的第一和第二信号电极形成在存储栅电极的两侧。 从源极将电子注入到栅极氮化物膜中，使得每个存储单元在其中存储信息。 存储栅电极和开关栅电极沿相同方向延伸。 因此，即使对共用存储栅电极和开关栅电极的每个写入型存储单元的存储栅电极施加高电压，并且通过第一和第二信号电极施加写和写分断电压， 用于写入不选择的每个存储单元可以避免由于开关栅电极保持在截止状态而向其施加高电场。