公开(公告)号：US4543626A

公开(公告)日：1985-09-24

申请号：US447228

申请日：1982-12-06

申请人： Robert Bean ,  Edward A. Gardner ,  Michael Chow ,  Barry L. Rubinson ,  Richard F. Lary ,  Robert Blackledge

发明人： Robert Bean ,  Edward A. Gardner ,  Michael Chow ,  Barry L. Rubinson ,  Richard F. Lary ,  Robert Blackledge

IPC分类号： G06F9/48 ,  G06F15/16 ,  G06F15/177 ,  G06F13/00

CPC分类号： G06F9/4881 ,  G06F15/161

摘要： A control arrangement for coordinating operations of multiple processors in a multiprocessor system in response to a command. Each command is associated with a route comprising a sequence of route vectors, each identifying an operation to be performed to execute the command, as well as the process, or station, to execute the route vector. In response to the receipt of a command, a control block is generated identifying the first route vector in the route associated with the command. Each station has a work queue containing control blocks, which the station retrieves and processes sequentially. The control block is first sent to the work queue of the station to perform the first operation. When the station gets to the control block, it performs the operation required by the route vector, modifies the control block to identify the next route vector in the sequence, and transfers the control block to the work queue of the station to perform the operation required by the next route vector in the route.

摘要翻译： 一种用于响应于命令协调多处理器系统中的多个处理器的操作的控制装置。 每个命令与包括路由向量序列的路由相关联，每个路由向量标识要执行的执行命令的操作以及进程或站来执行路由向量。 响应于接收到命令，生成识别与该命令相关联的路由中的第一路由向量的控制块。 每个工作站都有一个包含控制块的工作队列，该工作站将按顺序检索和处理。 控制块首先被发送到站的工作队列以执行第一操作。 当站到达控制块时，执行路由向量所需的操作，修改控制块以识别序列中的下一个路由向量，并将控制块传送到站的工作队列，以执行所需的操作 由路由中的下一个路由向量。

公开(公告)号：US4648035A

公开(公告)日：1987-03-03

申请号：US447229

申请日：1982-12-06

申请人： Thomas F. Fava ,  Robert Bean ,  Richard F. Lary ,  Robert Blackledge

发明人： Thomas F. Fava ,  Robert Bean ,  Richard F. Lary ,  Robert Blackledge

IPC分类号： G06F12/00 ,  G06F12/02 ,  G06F12/06 ,  G06F12/08 ,  G06F12/10 ,  G06F12/12 ,  G06F15/17 ,  G06F15/16

CPC分类号： G06F12/0284

摘要： An address conversion unit for a multiprocessor system including a common memory, and in which at least one processor includes a private memory, with the private memory and common memory having separate and distinct memory spaces. The conversion unit converts addresses between private addresses that are used within the processor itself and addresses that are used to retrieve contents of locations in common memory.

摘要翻译： 一种用于多处理器系统的地址转换单元，包括公共存储器，并且其中至少一个处理器包括专用存储器，其中专用存储器和公共存储器具有分离且不同的存储器空间。 转换单元转换处理器内部使用的私有地址之间的地址以及用于检索公共存储器中位置的内容的地址。

公开(公告)号：US08311776B2

公开(公告)日：2012-11-13

申请号：US12629028

申请日：2009-12-01

申请人： Robert Blackledge

发明人： Robert Blackledge

IPC分类号： G06F11/34 ,  G06F19/00 ,  G06F17/40 ,  G01D21/00

CPC分类号： H04L43/10 ,  H04L43/0888 ,  H04L43/50

摘要： The Data Throughput Tester (“DTT”) provides efficient and reliable methods to characterize the performance capabilities of electronic data systems. Embodiments of the DTT may allow test organizations to find the throughput limitations of a data system under test to the nearest whole packet in both an efficient and reliable manner. Embodiments of the DTT may allow determination of the throughput of a data system under test under the requirement that data output obtained from the data system is identical to the data input provided to the data system. Further embodiments of the DTT may allow determination of the throughput of a data system under test under the condition that specific performance characteristics of the data system under test satisfy pre-defined benchmark parameters. Further embodiments of the DTT may allow determination of the optimum throughput of a data system under test wherein different benchmark parameters are applied when testing the data system under different regimes of performance operating conditions. Further embodiments of the DTT highlighting various other advantageous aspects are discussed in the instant disclosure.

摘要翻译： 数据吞吐量测试仪（DTT）提供了高效可靠的方法来表征电子数据系统的性能。 DTT的实施例可以允许测试组织以有效和可靠的方式将待测数据系统的吞吐量限制找到最接近的整个分组。 根据从数据系统获得的数据输出与提供给数据系统的数据输入相同的要求，DTT的实施例可以允许确定被测数据系统的吞吐量。 在测试的数据系统的特定性能特征符合预定义的基准参数的条件下，DTT的其它实施例可以允许确定被测数据系统的吞吐量。 DTT的其他实施例可以允许确定被测数据系统的最佳吞吐量，其中当在不同的性能操作条件下测试数据系统时，应用不同的基准参数。 在本公开中讨论突出显示各种其它有利方面的DTT的其它实施例。

公开(公告)号：US20110131011A1

公开(公告)日：2011-06-02

申请号：US12629028

申请日：2009-12-01

申请人： Robert Blackledge

发明人： Robert Blackledge

IPC分类号： G06F15/00

CPC分类号： H04L43/10 ,  H04L43/0888 ,  H04L43/50

摘要： The Data Throughput Tester (“DTT”) provides efficient and reliable methods to characterize the performance capabilities of electronic data systems. Embodiments of the DTT may allow test organizations to find the throughput limitations of a data system under test to the nearest whole packet in both an efficient and reliable manner. Embodiments of the DTT may allow determination of the throughput of a data system under test under the requirement that data output obtained from the data system is identical to the data input provided to the data system. Further embodiments of the DTT may allow determination of the throughput of a data system under test under the condition that specific performance characteristics of the data system under test satisfy pre-defined benchmark parameters. Further embodiments of the DTT may allow determination of the optimum throughput of a data system under test wherein different benchmark parameters are applied when testing the data system under different regimes of performance operating conditions. Further embodiments of the DTT highlighting various other advantageous aspects are discussed in the instant disclosure.

摘要翻译： 数据吞吐量测试仪（“DTT”）提供了高效可靠的方法来表征电子数据系统的性能。 DTT的实施例可以允许测试组织以有效和可靠的方式将待测数据系统的吞吐量限制找到最接近的整个分组。 根据从数据系统获得的数据输出与提供给数据系统的数据输入相同的要求，DTT的实施例可以允许确定被测数据系统的吞吐量。 在测试的数据系统的特定性能特征符合预定义的基准参数的条件下，DTT的其它实施例可以允许确定被测数据系统的吞吐量。 DTT的其他实施例可以允许确定被测数据系统的最佳吞吐量，其中当在不同的性能操作条件下测试数据系统时，应用不同的基准参数。 在本公开中讨论突出显示各种其它有利方面的DTT的其它实施例。